公开(公告)号：US20070046368A1

公开(公告)日：2007-03-01

申请号：US11467067

申请日：2006-08-24

Applicant: Mark Gehring ,  Joseph Stenger

Inventor： Mark Gehring ,  Joseph Stenger

IPC: H03F3/191

CPC classification number: H03F3/191 ,  H03F3/45475 ,  H03F2200/453 ,  H03F2203/45288

Abstract: Systems and method for tracking different types of transconductance cells is shown and described. In these multi-cell systems, the addition of one or more tracking control modules allows circuit designers to advantageously incorporate multiple transconductor topologies and their uniquely beneficial characteristics into their designs, without eradicating its centralized multi-cell tuning functionality.

Abstract translation: 示出并描述了用于跟踪不同类型的跨导单元的系统和方法。 在这些多单元系统中，添加一个或多个跟踪控制模块允许电路设计者有利地将多个跨导体拓扑及其独特的有益特征结合到其设计中，而无需消除其集中的多单元调谐功能。

公开(公告)号：US07109763B1

公开(公告)日：2006-09-19

申请号：US10796873

申请日：2004-03-08

Applicant: Nathan Moyal ,  Eric Mitchell ,  Mark Gehring

Inventor： Nathan Moyal ,  Eric Mitchell ,  Mark Gehring

IPC: H03L7/00

CPC classification number: H03L7/183 ,  H03L7/099 ,  H03L7/10 ,  H03L2207/06

Abstract: A Phase Locked Loop (PLL) that has a substantially constant gain over a wide frequency range. The frequency range over which the PLL operates is divided into a number of frequency sub-ranges. The circuit includes a mechanism for adjusting the loop gain profile as the PLL moves from one frequency sub-range to another. When the PLL switches to a new frequency sub-range, the loop gain profile is adjusted to a pre-established value. Changes of frequency within each sub-range are then accomplished with the loop gain varying within a pre-established range.

Abstract translation: 锁相环（PLL），其在宽频率范围内具有基本恒定的增益。 PLL操作的频率范围被分为多个频率子范围。 该电路包括当PLL从一个频率子范围移动到另一个频率子范围时调整环路增益曲线的机构。 当PLL切换到新的频率子范围时，环路增益曲线调整到预先建立的值。 然后，在每个子范围内的频率变化，其中环路增益在预先建立的范围内变化。