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37 条记录 (耗时 0.054 秒)

    Memory controller, nonvolatile memory device, nonvolatile memory system and data writing method
    14.
    发明授权
    Memory controller, nonvolatile memory device, nonvolatile memory system and data writing method 有权
    存储控制器，非易失性存储器件，非易失性存储器系统和数据写入方法

    公开(公告)号：US07962824B2

    公开(公告)日：2011-06-14

    申请号：US11434494

    申请日：2006-05-16

    申请人： Masahiro Nakanishi ,  Manabu Inoue ,  Masayuki Toyama ,  Tomoaki Izumi ,  Tetsushi Kasahara ,  Kazuaki Tamura ,  Kiminori Matsuno

    发明人： Masahiro Nakanishi ,  Manabu Inoue ,  Masayuki Toyama ,  Tomoaki Izumi ,  Tetsushi Kasahara ,  Kazuaki Tamura ,  Kiminori Matsuno

    IPC分类号： G06F11/00

    CPC分类号： G11C29/82 ,  G11C11/5621 ,  G11C16/04 ,  G11C2029/0409

    摘要： With nonvolatile memory device employing a nonvolatile memory suc h as multiple-valued NAND flash memory or the like in which each memory cell holds data in a plurality of pages, there is such a problem that, if an error occurred under writing data, data stored in other page in the same group of the current page is changed, and hence the object of the present invention is to solve this problem. In writing data into a nonvolatile memory 110, when error occurred under writing data into a certain page, an error page identification part 128 identifies an error type and a physical address of the page where error occurred. An error corrector 129 then corrects errors occurred in other pages belonging to the same group of error occurrence page.

    摘要翻译： 采用非易失性存储器的非易失性存储器件成为多值NAND闪速存储器等，其中每个存储器单元保持多个页面中的数据，存在如下问题：如果在写入数据时发生错误，则存储数据 在当前页面的同一组中的其他页面中被改变，因此本发明的目的是解决这个问题。 在将数据写入非易失性存储器110时，当在特定页面中写入数据时发生错误时，错误页识别部件128识别错误发生的页面的错误类型和物理地址。 错误校正器129然后校正属于同一组错误发生页面的其他页面中发生的错误。

    Memory controller, nonvolatile storage device, nonvolatile storage system, and memory control method
    19.
    发明授权
    Memory controller, nonvolatile storage device, nonvolatile storage system, and memory control method 有权
    内存控制器，非易失性存储设备，非易失性存储系统和存储器控制方法

    公开(公告)号：US08051270B2

    公开(公告)日：2011-11-01

    申请号：US11914989

    申请日：2006-05-18

    申请人： Daisuke Kunimune ,  Masahiro Nakanishi ,  Manabu Inoue ,  Tomoaki Izumi ,  Tetsushi Kasahara ,  Kazuaki Tamura ,  Kiminori Matsuno

    发明人： Daisuke Kunimune ,  Masahiro Nakanishi ,  Manabu Inoue ,  Tomoaki Izumi ,  Tetsushi Kasahara ,  Kazuaki Tamura ,  Kiminori Matsuno

    IPC分类号： G06F12/06

    CPC分类号： G06F12/0246 ,  G06F2212/7201

    摘要： A memory controller for reducing a time to create an address management table during initialization of a memory card. The memory controller includes a read-write memory for temporarily storing the address management table and a second memory controller for writing, in a nonvolatile memory, an address management table temporarily stored in the read-write memory. The second memory controller also writes address range specifying information that specifies an address range, when a data writing destination is changed from a first address range to a second address range. The memory controller includes an address management table generator for reading distributed management information used for managing a state of at least one physical block included in the destination address range specified by the address range specifying information during initialization, and to generate the address management table based on the distributed management information.

    摘要翻译： 一种用于在存储卡初始化期间减少创建地址管理表的时间的存储器控​​制器。 存储器控制器包括用于临时存储地址管理表的读写存储器和用于在非易失性存储器中写入临时存储在读写存储器中的地址管理表的第二存储器控制器。 当数据写入目的地从第一地址范围改变到第二地址范围时，第二存储器控制器还写入指定地址范围的地址范围指定信息。 存储器控制器包括地址管理表发生器，用于读取用于管理初始化期间由地址范围指定信息指定的目的地地址范围中包括的至少一个物理块的状态的分布式管理信息，并且基于 分布式管理信息。

    Memory Controller, Nonvolatile Storage Device, Nonvolatile Storage System, and Memory Control Method
    20.
    发明申请
    Memory Controller, Nonvolatile Storage Device, Nonvolatile Storage System, and Memory Control Method 有权
    存储控制器，非易失存储设备，非易失存储系统和存储器控制方法

    公开(公告)号：US20080168252A1

    公开(公告)日：2008-07-10

    申请号：US11914989

    申请日：2006-05-18

    申请人： Daisuke Kunimune ,  Masahiro Nakanishi ,  Manabu Inoue ,  Tomoaki Izumi ,  Tetsushi Kasahara ,  Kazuaki Tamura ,  Kiminori Matsuno

    发明人： Daisuke Kunimune ,  Masahiro Nakanishi ,  Manabu Inoue ,  Tomoaki Izumi ,  Tetsushi Kasahara ,  Kazuaki Tamura ,  Kiminori Matsuno

    IPC分类号： G06F12/02 ,  G06F12/00

    CPC分类号： G06F12/0246 ,  G06F2212/7201

    摘要： The invention presents a memory controller capable of shortening the creation time of address management table at the time of initialization of memory card, while avoiding decline of access speed due to process of writing back the address management table in normal operation.The memory controller 114 includes a read-write memory 113 for temporarily storing the address management table 112, a memory control unit 122 for writing, in a nonvolatile memory 115, an address management table temporarily stored in the read-write memory and address range specifying information for specifying the changeover destination address range, when the physical block of data writing destination is changed over from a certain address range to other address range, and an address management table generation unit 107 for reading out the distributed management information used for managing the state of physical block included in the address range specified based on the address range specifying information at the time of initialization, and generating the address management table 112 based on the distributed management information being read out.

    摘要翻译： 本发明提出了一种能够缩短存储卡初始化时的地址管理表的创建时间的存储器控​​制器，同时避免由于在正常操作中写入地址管理表的过程而导致的访问速度的下降。 存储器控制器114包括用于临时存储地址管理表112的读写存储器113，用于在非易失性存储器115中写入临时存储在读写存储器中的地址管理表和指定地址范围的存储器控​​制单元122 用于指定切换目的地地址范围的信息，当数据写入目的地的物理块从特定地址范围改变到其他地址范围时，以及地址管理表生成单元107，用于读出用于管理状态的分布式管理信息 包括在基于初始化时的地址范围指定信息指定的地址范围内的物理块，并且基于被读出的分布式管理信息生成地址管理表112。