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    Method and system for memory address translation and pinning
    13.
    发明授权
    Method and system for memory address translation and pinning 失效
    内存地址转换和固定的方法和系统

    公开(公告)号：US07636800B2

    公开(公告)日：2009-12-22

    申请号：US11426588

    申请日：2006-06-27

    申请人： Shmuel Ben-Yehuda ,  Scott Guthridge ,  Orran Yaakov Krieger ,  Zorik Machulsky ,  Julian Satran ,  Leah Shalev ,  Ilan Shimony ,  James Xenidis

    发明人： Shmuel Ben-Yehuda ,  Scott Guthridge ,  Orran Yaakov Krieger ,  Zorik Machulsky ,  Julian Satran ,  Leah Shalev ,  Ilan Shimony ,  James Xenidis

    IPC分类号： G06F13/28 ,  G06F13/00 ,  G06F12/00 ,  G06F9/26 ,  G06F9/34

    CPC分类号： G06F12/1081 ,  G06F12/126 ,  G06F2212/1016 ,  G06F2212/1044

    摘要： A method and system for memory address translation and pinning are provided. The method includes attaching a memory address space identifier to a direct memory access (DMA) request, the DMA request is sent by a consumer and using a virtual address in a given address space. The method further includes looking up for the memory address space identifier to find a translation of the virtual address in the given address space used in the DMA request to a physical page frame. Provided that the physical page frame is found, pinning the physical page frame al song as the DMA request is in progress to prevent an unmapping operation of said virtual address in said given address space, and completing the DMA request, wherein the steps of attaching, looking up and pinning are centrally controlled by a host gateway.

    摘要翻译： 提供了一种用于存储器地址转换和钉扎的方法和系统。 该方法包括将存储器地址空间标识符附加到直接存储器访问（DMA）请求，DMA请求由消费者发送并且使用给定地址空间中的虚拟地址。 该方法还包括查找存储器地址空间标识符以找到在DMA请求中使用的给定地址空间中的虚拟地址到物理页面帧的转换。 如果发现物理页框，则在进行DMA请求时固定物理页框al歌，以防止在所述给定地址空间中所述虚拟地址的解映射操作，并完成DMA请求，其中， 查找和固定由主机网关集中控制。

    Device, method and computer program product for multi-level address translation
    14.
    发明授权
    Device, method and computer program product for multi-level address translation 有权
    用于多级地址转换的设备，方法和计算机程序产品

    公开(公告)号：US07600093B2

    公开(公告)日：2009-10-06

    申请号：US11623468

    申请日：2007-01-16

    申请人： Shmuel Ben-Yehuda ,  Orran Yaakov Krieger ,  Jon David Mason ,  James Xenidis

    发明人： Shmuel Ben-Yehuda ,  Orran Yaakov Krieger ,  Jon David Mason ,  James Xenidis

    IPC分类号： G06F12/00

    CPC分类号： G06F12/1081

    摘要： A method for retrieving information from a storage unit, the method includes: receiving, by an input output memory management unit second-level translation information representative of a partition of a storage unit address space; receiving, by a input output memory management unit, a direct memory access request that comprises a consumer identifier and a second memory address that was first-level translated by a communication circuit translation entity; performing, by the input output memory management unit, a second-level translation of the second memory address such as to provide a third memory address, in response to the identity of the consumer; and accessing the storage unit using the third memory address.

    摘要翻译： 一种从存储单元检索信息的方法，所述方法包括：通过输入输出存储器管理单元接收表示存储单元地址空间分区的二级转换信息; 由输入输出存储器管理单元接收直接存储器访问请求，该直接存储器访问请求包括消费者标识符和由通信电路转换实体首次翻译的第二存储器地址; 通过输入输出存储器管理单元，响应于消费者的身份，执行第二存储器地址的第二级转换，以提供第三存储器地址; 以及使用第三存储器地址访问存储单元。

    Method for integrating multiple object files from heterogeneous architectures into a set of files
    16.
    发明申请
    Method for integrating multiple object files from heterogeneous architectures into a set of files 审中-公开
    将异构架构中的多个目标文件集成到一组文件中的方法

    公开(公告)号：US20060095898A1

    公开(公告)日：2006-05-04

    申请号：US10976264

    申请日：2004-10-28

    申请人： Alex Chow ,  Michael Day ,  Michael Gowen ,  Keisuke Inoue ,  James Xenidis ,  Takayuki Uchikawa

    发明人： Alex Chow ,  Michael Day ,  Michael Gowen ,  Keisuke Inoue ,  James Xenidis ,  Takayuki Uchikawa

    IPC分类号： G06F9/45

    CPC分类号： G06F8/54 ,  G06F9/4484

    摘要： The present invention is a method for integrating multiple object codes from heterogeneous architectures. For a program on a first processor to reference a program from the name space of a second processor, the object code for the second-processor program is enclosed in a wrapper to create object code in the first-processor name space. The header of the wrapped object code defines a new symbol in the name space of the first processor, and the symbol points to the second-processor object code contained in the wrapped object code. Instead of directly referencing the second-processor object code, the referencing program on the first processor references the wrapped object code. A system tool can be used to wrap the object code which runs on the second processor.

    摘要翻译： 本发明是用于从异构架构集成多个目标代码的方法。 对于第一处理器上的程序从第二处理器的名称空间引用程序，第二处理器程序的目标代码被封装在包装器中以在第一处理器名称空间中创建目标代码。 包装对象代码的标题在第一处理器的名称空间中定义了一个新符号，并且符号指向包含在包装对象代码中的第二处理器对象代码。 代替直接引用第二处理器对象代码，第一处理器上的引用程序引用被包装的对象代码。 可以使用系统工具来包装在第二处理器上运行的目标代码。

    Process-specific views of large frame pages with variable granularity
    17.
    发明授权
    Process-specific views of large frame pages with variable granularity 有权
    具有可变粒度的大框架页面的特定于流程的视图

    公开(公告)号：US09158701B2

    公开(公告)日：2015-10-13

    申请号：US13541055

    申请日：2012-07-03

    申请人： Ahmed Gheith ,  Eric Van Hensbergen ,  James Xenidis

    发明人： Ahmed Gheith ,  Eric Van Hensbergen ,  James Xenidis

    IPC分类号： G06F12/00 ,  G06F12/10

    CPC分类号： G06F12/1009 ,  G06F12/109

    摘要： The page tables in existing art are modified to allow virtual address resolution by mapping to multiple overlapping entries, and resolving a physical address from the most specific entry. This enables more efficient use of system resources by allowing smaller frames to shadow larger frames. A page table is selected. When a virtual address in a request corresponds to an entry in the page table, which identifies a next page table associated with the large frame, a determination is made that the virtual address corresponds to an entry in the next page table, the entry in the next page table referencing a small frame overlay for the large frame. The virtual address is mapped to a physical address in the small frame overlay using data of the entry in the next page table. The physical address in a process-specific view of the large frame is returned.

    摘要翻译： 现有技术中的页表被修改为允许通过映射到多个重叠条目来实现虚拟地址解析，并从最特定的条目解析物理地址。 通过允许较小的帧来遮蔽较大的帧，这样可以更有效地利用系统资源。 选择页表。 当请求中的虚拟地址对应于页表中的与大帧相关联的下一页表的条目时，确定虚拟地址对应于下一页表中的条目， 引用大帧的小帧覆盖的下一页表。 使用下一页表中条目的数据将虚拟地址映射到小帧覆盖中的物理地址。 返回大帧的进程特定视图中的物理地址。

    Indicating disabled thread to other threads when contending instructions complete execution to ensure safe shared resource condition
    18.
    发明授权
    Indicating disabled thread to other threads when contending instructions complete execution to ensure safe shared resource condition 有权
    当竞争性指令完成执行以确保安全的共享资源状况时，指示禁用线程到其他线程

    公开(公告)号：US09047079B2

    公开(公告)日：2015-06-02

    申请号：US13435123

    申请日：2012-03-30

    申请人： Becky Bruce ,  Giles R. Frazier ,  Bradly G. Frey ,  Kumar K. Gala ,  Cathy May ,  Michael D. Snyder ,  Gary Whisenhunt ,  James Xenidis

    发明人： Becky Bruce ,  Giles R. Frazier ,  Bradly G. Frey ,  Kumar K. Gala ,  Cathy May ,  Michael D. Snyder ,  Gary Whisenhunt ,  James Xenidis

    IPC分类号： G06F9/46 ,  G06F9/30 ,  G06F9/38

    CPC分类号： G06F9/30101 ,  G06F9/30123 ,  G06F9/3851 ,  G06F9/3857 ,  G06F9/3889

    摘要： A technique for indicating a safe shared resource condition with respect to a disabled thread provides a mechanism for providing a fast indication to other hardware threads that a temporarily disabled thread can no longer impact shared resources, such as shared special-purpose registers and translation look-aside buffers within the processor core. Signals from pipelines within the core indicates whether any of the instructions pending in the pipeline impact the shared resources and if not, then the thread disable status is presented to the other threads via a state change in a thread status register. Upon receiving an indication that a particular hardware thread is to be disabled, control logic halts the dispatch of instructions for the particular hardware thread, and then waits until any indication that a shared resource is impacted by an instruction has cleared. Then the control logic updates the thread status to indicate the thread is disabled.

    摘要翻译： 用于指示关于被禁用线程的安全共享资源状况的技术提供了一种用于向其他硬件线程提供快速指示的机制，临时禁用的线程不再影响共享资源，例如共享专用寄存器和翻译查找， 处理器核心内的缓冲区。 来自核心内的流水线的信号表示流水线中的任何待执行的任何指示是否影响共享资源，如果没有，则通过线程状态寄存器中的状态更改将线程禁用状态呈现给其他线程。 在接收到特定硬件线程被禁用的指示时，控制逻辑停止对特定硬件线程的指令的分派，然后等待直到由指令影响共享资源的任何指示已经被清除。 然后控制逻辑更新线程状态以指示线程被禁用。

    COMPACTING A NON-BIASED RESULTS MULTISET
    20.
    发明申请
    COMPACTING A NON-BIASED RESULTS MULTISET 审中-公开
    实施非偏移结果多项式

    公开(公告)号：US20140074960A1

    公开(公告)日：2014-03-13

    申请号：US13609642

    申请日：2012-09-11

    申请人： John Bruce Carter ,  Colin Kimm Dixon ,  Wesley Michael Felter ,  Brent Edward Stephens ,  James Xenidis

    发明人： John Bruce Carter ,  Colin Kimm Dixon ,  Wesley Michael Felter ,  Brent Edward Stephens ,  James Xenidis

    IPC分类号： G06F12/02 ,  G06F15/167

    CPC分类号： H03M7/3084

    摘要： A method, system, and computer program product for compacting a non-biased results multiset are provided in the illustrative embodiments. A set of references and a multiset of values are identified. The multiset includes a first and a second set of values, each set including a first value. A first reference in the set of references refers to the first set of values and a second reference in the set of references refers to the second set of values. The values in the first and second set of values are re-arranged to form permuted first and second sets of values. The multiset is compacted by overlaying the permuted first and second sets of values in a portion such that the permuted first set of values and the permuted second set of values share a single instance of the first value in a portion of the compacted multiset.

    摘要翻译： 在说明性实施例中提供了用于压缩非偏置结果多集的方法，系统和计算机程序产品。 确定一组参考和多重值。 多集合包括第一和第二组值，每组包括第一值。 该组参考文献中的第一个引用指的是第一组值，该引用集中的第二个引用是指第二组值。 第一和第二组值中的值被重新排列以形成置换的第一和第二组值。 多重集合通过在一部分中重叠排列的第一和第二组值来压缩，使得经排列的第一组值和置换的第二组值在压缩的多集合的一部分中共享第一值的单个实例。