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    Increased capacity heterogeneous storage elements
    12.
    发明授权
    Increased capacity heterogeneous storage elements 有权
    增加容量的异构存储元件

    公开(公告)号：US08488397B2

    公开(公告)日：2013-07-16

    申请号：US13557298

    申请日：2012-07-25

    申请人： Ibrahim M. Elfadel ,  Michele Franceschini ,  Ashish Jagmohan ,  Luis A. Lastras-Montano ,  Mayank Sharma

    发明人： Ibrahim M. Elfadel ,  Michele Franceschini ,  Ashish Jagmohan ,  Luis A. Lastras-Montano ,  Mayank Sharma

    IPC分类号： G11C7/00

    CPC分类号： G11C29/08 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0069 ,  G11C2013/0076 ,  G11C2211/5641

    摘要： Providing increased capacity in heterogeneous storage elements including a method for reading from memory. The method includes receiving a read word from a block of memory cells, where physical characteristics of the memory cells support different sets of data levels. The read word is separated into two or more virtual read vectors. For each of the virtual read vectors, the codebook that was utilized to generate the virtual read vector is identified and a partial read data vector is generated. The generating includes multiplying the virtual read vector by a matrix that represents the codebook. The partial read data vectors are combined into a read message and the read message is output.

    摘要翻译： 在异构存储元件中提供增加的容量，包括从存储器读取的方法。 该方法包括从存储器单元块接收读取字，其中存储器单元的物理特性支持不同数据级的集合。 读取的字被分成两个或更多个虚拟读取向量。 对于每个虚拟读取向量，识别用于生成虚拟读取向量的码本，并生成部分读取数据向量。 生成包括将虚拟读取向量乘以代表码本的矩阵。 将部分读取数据矢量组合成读取消息，并输出读出的消息。

    Increased capacity heterogeneous storage elements
    13.
    发明授权
    Increased capacity heterogeneous storage elements 有权
    增加容量的异构存储元件

    公开(公告)号：US08553474B2

    公开(公告)日：2013-10-08

    申请号：US13557294

    申请日：2012-07-25

    申请人： Ibrahim M. Elfadel ,  Michele Franceschini ,  Ashish Jagmohan ,  Luis A. Lastras-Montano ,  Mayank Sharma

    发明人： Ibrahim M. Elfadel ,  Michele Franceschini ,  Ashish Jagmohan ,  Luis A. Lastras-Montano ,  Mayank Sharma

    IPC分类号： G11C7/00

    CPC分类号： G11C29/08 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0069 ,  G11C2013/0076 ,  G11C2211/5641

    摘要： Providing increased capacity in heterogeneous storage elements including a method for storing data in a heterogeneous memory that includes receiving a write message and a write address corresponding to a block of memory cells where at least two of the memory cells support different data levels, determining physical characteristics of the memory cells, and identifying virtual memories associated with the block of memory cells in response to the physical characteristics. The following is performed for each of the virtual memories: generating a constraint vector that describes the virtual cells in the virtual memory; and calculating a virtual write vector in response to the constraint vector and the write data, the calculating including writing the write data, bit by bit, in order, into the virtual memory, skipping locations known to be stuck to a particular value as indicated by the constraint vector. The virtual write vectors are combined into a write word and the write word is output to the block of memory cells.

    摘要翻译： 提供异构存储元件中的增加的容量，包括用于在异构存储器中存储数据的方法，该方法包括接收对应于其中至少两个存储器单元支持不同数据电平的存储器单元块的写入消息和写入地址，确定物理特性 并且响应于物理特性识别与存储器单元块相关联的虚拟存储器。 对每个虚拟存储器执行以下操作：生成描述虚拟存储器中的虚拟单元的约束向量; 以及响应于所述约束向量和所述写入数据计算虚拟写入向量，所述计算包括按顺序将所述写入数据逐位写入到所述虚拟存储器中，跳过已知被粘附到特定值的位置，如 约束向量。 虚拟写入向量被组合成写入字，并将写入字输出到存储器单元块。

    RECLAIMING DISCARDED SOLID STATE DEVICES
    15.
    发明申请
    RECLAIMING DISCARDED SOLID STATE DEVICES 有权
    重新抛弃固定状态装置

    公开(公告)号：US20130212427A1

    公开(公告)日：2013-08-15

    申请号：US13396020

    申请日：2012-02-14

    申请人： Michele M. Franceschini ,  Ashish Jagmohan ,  Luis A. Lastras-Montano ,  Mayank Sharma

    发明人： Michele M. Franceschini ,  Ashish Jagmohan ,  Luis A. Lastras-Montano ,  Mayank Sharma

    IPC分类号： G06F11/16

    CPC分类号： G11C29/56008 ,  G06F11/2289 ,  G06F11/3409 ,  G11C16/349

    摘要： Discarded memory devices unfit for an original purpose can be reclaimed for reuse for another purpose. The discarded memory devices are tested and evaluated to determine the level of performance degradation therein. A set of an alternate usage and an information encoding scheme to facilitate a reuse of the tested memory device is identified based on the evaluation of the discarded memory device. A memory chip controller may be configured to facilitate usage of reclaimed memory devices by enabling a plurality of encoding schemes therein. Further, a memory device can be configured to facilitate diagnosis of the functionality, and to facilitate usage as a discarded memory unit. Waste due to discarded memory devices can be thereby reduced.

    摘要翻译： 废弃的不适合原始目的的存储设备可以回收再利用用于另一目的。 对废弃的存储器件进行测试和评估，以确定其中性能下降的程度。 基于对废弃的存储器件的评估来识别一组替代使用和信息编码方案，以便于重新使用被测试的存储器件。 存储器芯片控制器可以被配置为通过使能其中的多个编码方案来促进再生存储器件的使用。 此外，存储器装置可以被配置为便于诊断功能，并且便于作为丢弃的存储器单元的使用。 因此可以减少由于废弃的存储器件造成的浪费。

    Probabilistic multi-tier error correction in not-and (NAND) flash memory
    16.
    发明授权
    Probabilistic multi-tier error correction in not-and (NAND) flash memory 有权
    不和（NAND）闪存中的概率多层纠错

    公开(公告)号：US08464137B2

    公开(公告)日：2013-06-11

    申请号：US12960004

    申请日：2010-12-03

    申请人： Michele M. Franceschini ,  Ashish Jagmohan ,  Luis A. Lastras-Montano ,  Mayank Sharma

    发明人： Michele M. Franceschini ,  Ashish Jagmohan ,  Luis A. Lastras-Montano ,  Mayank Sharma

    IPC分类号： G06F11/00

    CPC分类号： G06F11/1012 ,  H03M13/2906 ,  H03M13/3715 ,  H03M13/3738

    摘要： Error correction in not-and (NAND) flash memory including a system for retrieving data from memory. The system includes a decoder in communication with a memory. The decoder is for performing a method that includes receiving a codeword stored on a page in the memory, the codeword including data and first-tier check symbols that are generated in response to the data. The method further includes determining that the codeword includes errors that cannot be corrected using the first-tier check symbols, and in response second-tier check symbols are received. The second-tier check symbols are generated in response to receiving the data and to the contents of other pages in the memory that were written prior to the page containing the codeword. The codeword is corrected in response to the second-tier check symbols. The corrected codeword is output.

    摘要翻译： 在非NAND（NAND）闪存中包括用于从存储器检索数据的系统的纠错。 该系统包括与存储器通信的解码器。 解码器用于执行包括接收存储在存储器中的页面上的码字的方法，所述码字包括响应于该数据生成的数据和第一层校验符号。 该方法还包括确定码字包括不能使用第一层校验符号校正的错误，并且响应于接收到第二层校验符号。 响应于接收到包含码字的页面之前写入的数据和存储器中其他页面的内容，生成第二层校验符号。 响应于第二层校验符号校正码字。 校正的码字被输出。

    Multi-write coding of non-volatile memories
    18.
    发明授权
    Multi-write coding of non-volatile memories 有权
    非易失性存储器的多写编码

    公开(公告)号：US08176234B2

    公开(公告)日：2012-05-08

    申请号：US12631470

    申请日：2009-12-04

    申请人： Michele M. Franceschini ,  Ashish Jagmohan ,  Luis A. Lastras-Montano

    发明人： Michele M. Franceschini ,  Ashish Jagmohan ,  Luis A. Lastras-Montano

    IPC分类号： G06F12/00

    CPC分类号： G06F12/0246 ,  G06F2212/401 ,  G11C11/5621 ,  G11C16/3418 ,  G11C16/349

    摘要： Multi-write coding of non-volatile memories including a method that receives write data, and a write address of a memory page. The memory page is in either an erased state or a previously written state. If the memory page is in the erased state: selecting a first codeword from a code such that the first codeword encodes the write data and is consistent with a target set of distributions of electrical charge levels in the memory page; and writing the first codeword to the memory page. If the memory page is in the previously written state: selecting a coset from a linear code such that the coset encodes the write data and includes one or more words that are consistent with previously written content of the memory page; selecting a subsequent codeword from the one or more words in the coset; and writing the subsequent codeword to the memory page.

    摘要翻译： 包括接收写入数据的方法的非易失性存储器的多写入编码以及存储器页面的写入地址。 存储器页面处于擦除状态或先前写入的状态。 如果存储器页面处于擦除状态：从代码中选择第一码字，使得第一码字对写入数据进行编码，并与存储器页面中的电荷电平分布的目标集合一致; 以及将所述第一码字写入所述存储器页。 如果存储器页面处于先前写入的状态：从线性代码选择陪集，使得陪集对编写数据进行编码并且包括与存储器页面的先前写入的内容一致的一个或多个单词; 从陪集中的一个或多个单词中选择随后的码字; 以及将所述后续码字写入所述存储器页面。