公开(公告)号：US20220406847A1

公开(公告)日：2022-12-22

申请号：US17846731

申请日：2022-06-22

Applicant: Micron Technology, Inc.

Inventor： Lei Wei ,  Pengyuan Zheng ,  Kevin Lee Baker ,  Efe Sinan Ege ,  Adam Thomas Barton ,  Rajasekhar Venigalla

IPC: H01L27/24 ,  H01L45/00

Abstract: A memory system may include separate amounts or types of resistive material that may be deposited over memory cells and conductive vias using separate resistive layers in the access lines. A first resistive material layer may be deposited over the memory cells prior to performing an array termination etch used to deposit the conductive via. The array termination etch may remove the first resistive material over the portion of the array used to deposit the conductive via. A second resistive material layer may be deposited after the etch has occurred and the conductive via has been formed. The second resistive material layer may be deposited over the conductive via.

公开(公告)号：US20220069216A1

公开(公告)日：2022-03-03

申请号：US17468167

申请日：2021-09-07

Applicant: Micron Technology, Inc.

Inventor： Rajasekhar Venigalla ,  Patrick M. Flynn ,  Josiah Jebaraj Johnley Muthuraj ,  Efe Sinan Ege ,  Kevin Lee Baker ,  Tao Nguyen ,  Davis Weymann

IPC: H01L45/00 ,  H01L21/768 ,  H01L23/522 ,  H01L27/24 ,  G11C13/00 ,  H01L23/528

Abstract: Methods, systems, and devices for a low resistance crosspoint architecture are described. A manufacturing system may deposit a thermal barrier material, followed by a first layer of a first conductive material, on a layered assembly including a patterned layer of electrode materials and a patterned layer of a memory material. The manufacturing system may etch a first area of the layered assembly to form a gap in the first layer of the first conductive material, the thermal barrier material, the patterned layer of the memory material, and the patterned layer of electrode materials. The manufacturing system may deposit a second conductive material to form a conductive via in the gap, where the conductive via extends to a height within the layered assembly that is above the thermal barrier material.

公开(公告)号：US11121317B2

公开(公告)日：2021-09-14

申请号：US16684520

申请日：2019-11-14

Applicant: Micron Technology, Inc.

Inventor： Rajasekhar Venigalla ,  Patrick M. Flynn ,  Josiah Jebaraj Johnley Muthuraj ,  Efe Sinan Ege ,  Kevin Lee Baker ,  Tao Nguyen ,  Davis Weymann

IPC: H01L45/00 ,  H01L21/768 ,  H01L23/522 ,  H01L27/24 ,  G11C13/00 ,  H01L23/528

Abstract: Methods, systems, and devices for a low resistance crosspoint architecture are described. A manufacturing system may deposit a thermal barrier material, followed by a first layer of a first conductive material, on a layered assembly including a patterned layer of electrode materials and a patterned layer of a memory material. The manufacturing system may etch a first area of the layered assembly to form a gap in the first layer of the first conductive material, the thermal barrier material, the patterned layer of the memory material, and the patterned layer of electrode materials. The manufacturing system may deposit a second conductive material to form a conductive via in the gap, where the conductive via extends to a height within the layered assembly that is above the thermal barrier material.

公开(公告)号：US20210151675A1

公开(公告)日：2021-05-20

申请号：US16684520

申请日：2019-11-14

Applicant: Micron Technology, Inc.

Inventor： Rajasekhar Venigalla ,  Patrick M. Flynn ,  Josiah Jebaraj Johnley Muthuraj ,  Efe Sinan Ege ,  Kevin Lee Baker ,  Tao Nguyen ,  Davis Weymann

IPC: H01L45/00 ,  H01L21/768 ,  H01L23/522 ,  H01L27/24 ,  G11C13/00 ,  H01L23/528

Abstract: Methods, systems, and devices for a low resistance crosspoint architecture are described. A manufacturing system may deposit a thermal barrier material, followed by a first layer of a first conductive material, on a layered assembly including a patterned layer of electrode materials and a patterned layer of a memory material. The manufacturing system may etch a first area of the layered assembly to form a gap in the first layer of the first conductive material, the thermal barrier material, the patterned layer of the memory material, and the patterned layer of electrode materials. The manufacturing system may deposit a second conductive material to form a conductive via in the gap, where the conductive via extends to a height within the layered assembly that is above the thermal barrier material.