公开(公告)号：US10943656B2

公开(公告)日：2021-03-09

申请号：US16419845

申请日：2019-05-22

Applicant: Micron Technology, Inc.

Inventor： Umberto Di Vincenzo ,  Simone Lombardo

IPC: G11C13/00 ,  G11C11/56

Abstract: Apparatus and methods utilize a replica circuit to generate a voltage for programming of a memory cell, such as a memory cell of a phase-change memory (PCM). Current passing through a circuit including the memory cell to be programmed is mirrored in a scaled or unscaled manner, and provided as an input to the replica circuit. The replica circuit represents voltage drops that should be encountered when programming the memory cell. An input voltage is also provided to the replica circuit, which affects the voltage drop within the replica circuit that represents the voltage drop of the cell. The voltage drop across the replica circuit can then be mirrored and provided to bias the circuit including the memory cell.

公开(公告)号：US10373681B2

公开(公告)日：2019-08-06

申请号：US15670920

申请日：2017-08-07

Applicant: Micron Technology, Inc.

Inventor： Umberto Di Vincenzo ,  Simone Lombardo

IPC: G11C13/00 ,  G11C11/56

Abstract: Apparatus and methods utilize a replica circuit to generate a voltage for programming of a memory cell, such as a memory cell of a phase-change memory (PCM). Current passing through a circuit including the memory cell to be programmed is mirrored in a scaled or unscaled manner, and provided as an input to the replica circuit. The replica circuit represents voltage drops that should be encountered when programming the memory cell. An input voltage is also provided to the replica circuit, which affects the voltage drop within the replica circuit that represents the voltage drop of the cell. The voltage drop across the replica circuit can then be mirrored and provided to bias the circuit including the memory cell.

公开(公告)号：US20180090206A1

公开(公告)日：2018-03-29

申请号：US15831096

申请日：2017-12-04

Applicant: Micron Technology, Inc.

Inventor： Richard E. Fackenthal ,  Simone Lombardo

IPC: G11C13/00

CPC classification number: G11C13/0069 ,  G11C13/0011 ,  G11C13/003 ,  G11C13/0061 ,  G11C2013/0078 ,  G11C2013/0092

Abstract: Memory systems and memory programming methods are described. In one arrangement, a memory system includes a memory cell configured to have a plurality of different memory states, an access circuit coupled with the memory cell and configured to provide a first signal to a memory element of the memory cell to program the memory cell from a first memory state to a second memory state, and a current source coupled with the memory cell and configured to generate a second signal which is provided to the memory element of the memory cell after the first signal to complete programming of the memory cell from the first memory state to the second memory state.

公开(公告)号：US20170352417A1

公开(公告)日：2017-12-07

申请号：US15670920

申请日：2017-08-07

Applicant: Micron Technology, Inc.

Inventor： Umberto Di Vincenzo ,  Simone Lombardo

IPC: G11C13/00 ,  G11C11/56

CPC classification number: G11C13/0069 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0023 ,  G11C13/0038 ,  G11C2211/5645 ,  G11C2213/72

Abstract: Apparatus and methods utilize a replica circuit to generate a voltage for programming of a memory cell, such as a memory cell of a phase-change memory (PCM). Current passing through a circuit including the memory cell to be programmed is mirrored in a scaled or unscaled manner, and provided as an input to the replica circuit. The replica circuit represents voltage drops that should be encountered when programming the memory cell. An input voltage is also provided to the replica circuit, which affects the voltage drop within the replica circuit that represents the voltage drop of the cell. The voltage drop across the replica circuit can then be mirrored and provided to bias the circuit including the memory cell.

公开(公告)号：US09837151B2

公开(公告)日：2017-12-05

申请号：US15150168

申请日：2016-05-09

Applicant: Micron Technology, Inc.

Inventor： Richard E. Fackenthal ,  Simone Lombardo

IPC: G11C11/00 ,  G11C13/00

CPC classification number: G11C13/0069 ,  G11C13/0011 ,  G11C13/003 ,  G11C13/0061 ,  G11C2013/0078 ,  G11C2013/0092

Abstract: Memory systems and memory programming methods are described. In one arrangement, a memory system includes a memory cell configured to have a plurality of different memory states, an access circuit coupled with the memory cell and configured to provide a first signal to a memory element of the memory cell to program the memory cell from a first memory state to a second memory state, and a current source coupled with the memory cell and configured to generate a second signal which is provided to the memory element of the memory cell after the first signal to complete programming of the memory cell from the first memory state to the second memory state.

公开(公告)号：US09336875B2

公开(公告)日：2016-05-10

申请号：US14107764

申请日：2013-12-16

Applicant: Micron Technology, Inc.

Inventor： Richard E. Fackenthal ,  Simone Lombardo

IPC: G11C11/00 ,  G11C13/00

CPC classification number: G11C13/0069 ,  G11C13/0011 ,  G11C13/003 ,  G11C13/0061 ,  G11C2013/0078 ,  G11C2013/0092

Abstract: Memory systems and memory programming methods are described. In one arrangement, a memory system includes a memory cell configured to have a plurality of different memory states, an access circuit coupled with the memory cell and configured to provide a first signal to a memory element of the memory cell to program the memory cell from a first memory state to a second memory state, and a current source coupled with the memory cell and configured to generate a second signal which is provided to the memory element of the memory cell after the first signal to complete programming of the memory cell from the first memory state to the second memory state.

Abstract translation: 描述了存储器系统和存储器编程方法。 在一种布置中，存储器系统包括被配置为具有多个不同存储器状态的存储单元，与存储单元耦合的存取电路，并被配置为向存储器单元的存储元件提供第一信号以对存储单元进行编程 第一存储器状态到第二存储器状态，以及与存储器单元耦合的电流源，并且被配置为产生第二信号，该第二信号在第一信号之后被提供给存储器单元的存储元件，以完成存储器单元的编程 第一存储器状态到第二存储器状态。