公开(公告)号：US20200233828A1

公开(公告)日：2020-07-23

申请号：US16840281

申请日：2020-04-03

Applicant: Micron Technology, Inc.

Inventor： Yuki Ebihara ,  Seiji Narui

IPC: G06F13/42 ,  G11C11/4093 ,  H01L27/108 ,  G11C11/402

Abstract: Apparatuses and methods of data transmission between semiconductor chips are described. An example apparatus includes: a data bus inversion (DBI) circuit that receives first, second and third input data in order, and further provides first, second and third output data, either with or without data bus inversion. The DBI circuit includes a first circuit that latches the first input data and the third input data; a second circuit that latches the second input data; a first DBI calculator circuit that performs first DBI calculation on the latched first input data and the latched second input data responsive to the first circuit latching the first input data and the second circuit latching the second input data, respectively; and a second DBI calculator circuit that performs second DBI calculation on the latched second data and the latched third input data responsive to the first circuit latching the third input data.

公开(公告)号：US10468114B2

公开(公告)日：2019-11-05

申请号：US16013290

申请日：2018-06-20

Applicant: Micron Technology, Inc.

Inventor： Chiaki Dono ,  Taihei Shido ,  Yuki Ebihara

IPC: G11C29/00 ,  G11C29/38 ,  G11C29/36 ,  G11C29/44 ,  G11C29/12 ,  G11C29/48

Abstract: Apparatuses and methods for an interface chip that interfaces with chips are described. An example apparatus includes: first terminals; circuit groups, each of the circuit groups including circuit blocks being configured to electrically couple to the first terminals; a control circuit that selects one of the circuit groups and electrically couple the first terminals to the circuit blocks of the one of the circuit groups; terminal groups, each of the terminal groups including second terminals, each of the terminal groups being provided correspondingly to each of the circuit groups, the second terminals of each of the terminal groups being smaller in number than the circuit blocks of a corresponding one of the circuit groups; and a remapping circuit that couples the second terminals of each of the terminal groups to selected ones of the circuit blocks of the corresponding one of the circuit groups.

公开(公告)号：US20180301202A1

公开(公告)日：2018-10-18

申请号：US16013290

申请日：2018-06-20

Applicant: Micron Technology, Inc.

Inventor： Chiaki Dono ,  Taihei Shido ,  Yuki Ebihara

IPC: G11C29/38 ,  G11C29/00 ,  G11C29/48 ,  G11C29/44 ,  G11C29/36 ,  G11C29/12

Abstract: Apparatuses and methods for an interface chip that interfaces with chips are described. An example apparatus includes: first terminals; circuit groups, each of the circuit groups including circuit blocks being configured to electrically couple to the first terminals; a control circuit that selects one of the circuit groups and electrically couple the first terminals to the circuit blocks of the one of the circuit groups; terminal groups, each of the terminal groups including second terminals, each of the terminal groups being provided correspondingly to each of the circuit groups, the second terminals of each of the terminal groups being smaller in number than the circuit blocks of a corresponding one of the circuit groups; and a remapping circuit that couples the second terminals of each of the terminal groups to selected ones of the circuit blocks of the corresponding one of the circuit groups.

公开(公告)号：US10008287B2

公开(公告)日：2018-06-26

申请号：US15217719

申请日：2016-07-22

Applicant: Micron Technology, Inc.

Inventor： Chiaki Dono ,  Taihei Shido ,  Yuki Ebihara

IPC: G11C29/00 ,  G11C29/38 ,  G11C29/36 ,  G11C29/44

Abstract: Apparatuses and methods for an interface chip are described. An example apparatus includes a first chip. The first chip includes, on a single semiconductor substrate, first terminals, circuit groups, and terminal groups corresponding to the circuit groups, each of the circuit groups including circuit blocks. A control circuit in the first chip selects one of the circuit groups and electrically couples the first terminals to the circuit blocks of the selected circuit group. Second terminals are included in each of the terminal groups. A number of all of the second terminals in each of the terminal groups is smaller than a number of all of the circuit blocks in the corresponding circuit group. The first chip further includes, for example, a remapping circuit.