MAC TAG LIST GENERATION APPARATUS, MAC TAG LIST VERIFICATION APPARATUS, METHOD, AND PROGRAM

    公开(公告)号:US20220173909A1

    公开(公告)日:2022-06-02

    申请号:US17601136

    申请日:2019-04-18

    Abstract: A MAC tag list generation apparatus includes: a message input part; a group testing matrix generation part which generates a t×m group testing matrix H that is a parameter(s) of combinatorial group testing with respect to the number s (s being a positive integer) of the MACs to be generated, a decodable linear group testing MAC application part which, with respect to the message M, using the group testing matrix H, a variable-length-input fixed-length-output pseudorandom function F; and a Tweakable block cipher G for which a row index of the group testing matrix H is a Tweak, generates a MAC tag list T=(T[1], . . . , T[t]); and a MAC tag list output part which outputs the MAC tag list.

    METHOD AND APPARATUS FOR CONSTRUCTION OF POLAR CODES

    公开(公告)号:US20210391945A1

    公开(公告)日:2021-12-16

    申请号:US17283289

    申请日:2018-10-10

    Abstract: A communication apparatus for forward error correction and detection using polar codes comprising a polar encoder that encodes an input vector to output a codeword using a generator matrix of polar code wherein the input vector is a cyclic redundancy check (CRC) codeword of an information block; a memory that stores a frozen set including frozen bit indices and a non-frozen set including non-frozen bit indices sorted in order of error probabilities; and a controller that is configured to take as input the CRC codeword where CRC bits appended to the end of information block and interleave the CRC codeword using at least one of a first interleaver and second interleaver before feeding the CRC codeword to polar encoder such that the first interleaver places at least one CRC bit earlier than its original position in the CRC codeword and a second interleaver selects at least one bit from the CRC codeword whose corresponding index in a parity check matrix of the CRC code has the highest column weight and puts it in the non-frozen bit index with highest error probability.

    DECODING APPARATUS, DECODING METHOD, AND NON -TRANSITORY COMPUTER READABLE MEDIUM

    公开(公告)号:US20210250052A1

    公开(公告)日:2021-08-12

    申请号:US16972957

    申请日:2018-06-08

    Inventor: Norifumi KAMIYA

    Abstract: A decoding apparatus (10) includes a multi-input branch metric calculation unit (11) configured to calculate, by using a branch label corresponding to a path extending toward a state S at a time point N in a trellis diagram and a plurality of reception signal sequences, a branch metric in the state S, a path metric calculation unit (12) configured to calculate a path metric in the state S at the time point N, and a surviving path list memory (13) configured to store path labels corresponding to L path metrics among a plurality of calculated path metrics. The path metric calculation unit (12) generates a path label in the state S at the time point N by combining the branch label with a path label in each of the states at the time point N−1 and the surviving path list memory (13) outputs path labels corresponding to L path metrics.

    ERROR-CORRECTION ENCODING METHOD AND DEVICE, AND DECODING METHOD AND DEVICE USING CHANNEL POLARIZATION

    公开(公告)号:US20200321982A1

    公开(公告)日:2020-10-08

    申请号:US16956004

    申请日:2017-12-27

    Inventor: Norifumi KAMIYA

    Abstract: [Problem] Encoding and decoding techniques capable of speeding up an error-correction decoding process utilizing channel polarization are provided.[Solution] In an encoding device, the information bit sequence is input on division for each designated bit length; error-correction encoding is performed on an information block of the designated bit length to generate L M-bit codes, each M-bit code having a predetermined bit length M; the L M-bit codes are converted into M L-bit blocks each having a predetermined bit length of L; the M L-bit blocks are Polar-converted to M L-bit codes, each L-bit code having a bit length of L, through channel polarization processing; and division of the information bit sequence is determined based on channel polarization information.

    COMMUNICATION APPARATUS, DEMODULATION APPARATUS, CARRIER REPRODUCTION APPARATUS, PHASE ERROR COMPENSATION APPARATUS, PHASE ERROR COMPENSATION METHOD, AND STORAGE MEDIUM ON WHICH PHASE ERROR COMPENSATION PROGRAM HAS BEEN STORED
    16.
    发明申请
    COMMUNICATION APPARATUS, DEMODULATION APPARATUS, CARRIER REPRODUCTION APPARATUS, PHASE ERROR COMPENSATION APPARATUS, PHASE ERROR COMPENSATION METHOD, AND STORAGE MEDIUM ON WHICH PHASE ERROR COMPENSATION PROGRAM HAS BEEN STORED 有权
    通信装置,解调装置,载体再现装置,相位误差补偿装置,相位误差补偿方法以及相位错误补偿程序已存储的存储介质

    公开(公告)号:US20160330064A1

    公开(公告)日:2016-11-10

    申请号:US15110451

    申请日:2015-01-15

    CPC classification number: H04L27/3872 H04L27/0014 H04L2027/0067

    Abstract: To enable a large-capacity, high-quality data communication that is excellent in bit error rate characteristic even in an adverse noise environment mainly caused by phase noises or thermal noises. [Solution] Included are: a first phase error detection filter that generates, on the basis of a forward sequence of received symbols, a first phase difference value and a first phase error estimated value; a second phase error detection filter that generates, on the basis of a backward sequence of received symbols, a second phase difference value and a second phase error estimated value; a phase error combination means that generates a third phase error estimated value on the basis of the first and second phase error estimated values and one of the first and second phase difference values; and a phase error compensation means that compensates the phase error of the received symbols in accordance with the third phase error estimated value.

    Abstract translation: 即使在主要由相位噪声或热噪声引起的不利噪声环境下,也能够实现出色性能优异的大容量,高质量的数据通信。 [解决方案]包括:第一相位误差检测滤波器,其基于接收符号的前向序列生成第一相位差值和第一相位误差估计值; 第二相位误差检测滤波器,其基于接收符号的反向序列生成第二相位差值和第二相位误差估计值; 相位误差组合装置,其基于第一和第二相位误差估计值和第一和第二相位差值之一产生第三相位误差估计值; 以及根据第三相位误差估计值补偿接收符号的相位误差的相位误差补偿装置。

    RADIO TRANSMISSION DEVICE AND RADIO RECEPTION DEVICE

    公开(公告)号:US20230396476A1

    公开(公告)日:2023-12-07

    申请号:US18204686

    申请日:2023-06-01

    CPC classification number: H04L27/2613 H04L27/2636

    Abstract: In a radio transmission device, an orthogonal frequency division multiplexing (OFDM) signal forming unit forms an OFDM signal by arranging pilot signals according to a pilot arrangement pattern. According to the pilot arrangement pattern, among a plurality of pilot arrangement subcarriers with an NPilot_Freq-subcarrier interval, in a plurality of first pilot arrangement subcarriers with an NPilot_SPA-subcarrier interval, pilot signals for phase noise estimation are arranged in all resource elements. An information symbol and a pilot symbol are mapped to different resource elements. Among the plurality of pilot arrangement subcarriers with the NPilot_Freq-subcarrier interval, in a plurality of second pilot arrangement subcarriers excluding the plurality of first pilot arrangement subcarriers, the pilot signals for phase noise estimation are arranged in a cycle of NPilot_Time resource elements in the time domain.

    SORTING DEVICE, SELECTING SYSTEM, SORTING METHOD, AND NONTRANSITORY COMPUTER READABLE MEDIUM

    公开(公告)号:US20220206746A1

    公开(公告)日:2022-06-30

    申请号:US17604075

    申请日:2019-04-19

    Inventor: Norifumi KAMIYA

    Abstract: An object is to provide a sorting device, a selecting system, a sorting method, and a program capable of preventing a decrease in processing speed and an increase in the number of processing steps. The sorting device includes a rank computation device (101) that performs, in parallel, comparisons of numerical data Dk (k is an integer from 0 to n−1) included in numerical data D0 to Dn-1 (n is an integer of 1 or more) with each of the numerical data D0 to Dn-1 excluding the numerical data Dk, and computes a rank indicating a value level of the numerical data Dk in the numerical data D0 to Dn-1 by using each comparison result, and a selection device (102) that rearranges the numerical data D0 to Dn-1 in order on the basis of ranks of the numerical data D0 to Dn-1.

    MODULATION APPARATUS AND DEMODULATION APPARATUS

    公开(公告)号:US20220190894A1

    公开(公告)日:2022-06-16

    申请号:US17605088

    申请日:2020-04-06

    Abstract: A modulation apparatus capable of performing highly efficient multiplexing of pilot signals used for equalization and estimation of phase noises for LOS-MIMO (Line Of Sight-Multiple Input Multiple Output) using a single-carrier signal is provided. The modulation apparatus (10) includes means (11) for transforming a time-domain pilot signal sequence into a first number of frequency-domain signals corresponding to a sequence length of the pilot signal sequence, means (12) for mapping the first number of frequency-domain signals at the same number of subcarrier intervals as a number of transmitting antennas of the modulation apparatus by shifting mapping positions of heads of the frequency-domain signals one after another by an amount equivalent to one subcarrier so that the frequency-domain signals do not overlap each other, and means (13) for transforming the mapped frequency-domain signals into time-domain signals.

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