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公开(公告)号:US20230317433A1
公开(公告)日:2023-10-05
申请号:US18166585
申请日:2023-02-09
Applicant: NGK Insulators, Ltd.
Inventor: Seiya INOUE , Tatsuya KUNO , Ikuhisa MORIOKA
IPC: H01J37/32 , H01L21/683
CPC classification number: H01J37/32724 , H01L21/6833 , H01J2237/2007 , H01J2237/002
Abstract: A wafer placement table includes: a ceramic plate having a wafer placement surface on its upper surface and incorporating an electrode; an electrically conductive plate provided on a lower surface side of the ceramic plate; an electrically conductive bonding layer that bonds the ceramic plate with the electrically conductive plate; a gas intermediate passage embedded in the electrically conductive bonding layer or provided at an interface between the electrically conductive bonding layer and the electrically conductive plate; a plurality of gas supply passages extending from the gas intermediate passage through the electrically conductive bonding layer and the ceramic plate to the wafer placement surface; and a gas introduction passage provided so as to extend through the electrically conductive plate and communicate with the gas intermediate passage, the number of the gas introduction passages being smaller than the number of the gas supply passages communicating with the gas intermediate passage.
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公开(公告)号:US20230317432A1
公开(公告)日:2023-10-05
申请号:US18157207
申请日:2023-01-20
Applicant: NGK Insulators, Ltd.
Inventor: Tatsuya KUNO , Seiya INOUE
CPC classification number: H01J37/32724 , B32B18/00 , B32B7/12 , B32B3/266 , H01J2237/002
Abstract: In a wafer placement table, a cooling plate having a refrigerant flow channel is provided on a bottom surface side of a ceramic plate incorporating an electrode. A gas intermediate passage that is a horizontal space is provided parallel to a wafer placement surface at a location closer to the wafer placement surface than the refrigerant flow channel in the wafer placement table and has an overlapping part that overlaps the refrigerant flow channel along the refrigerant flow channel in plan view.
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公开(公告)号:US20230197502A1
公开(公告)日:2023-06-22
申请号:US18065018
申请日:2022-12-13
Applicant: NGK Insulators, Ltd.
Inventor: Seiya INOUE , Tatsuya KUNO , Kanta MIYAMOTO
IPC: H01L21/687 , H01L21/683
CPC classification number: H01L21/68785 , H01L21/68757 , H01L21/6833
Abstract: A member for semiconductor manufacturing apparatus includes: a ceramic plate that has an upper surface including a wafer placement surface; a conductive base that is disposed on a lower surface of the ceramic plate; a first hole that extends through the ceramic plate; a second hole that extends through the conductive base; a porous plug that has an upper surface that is exposed from an upper opening of the first hole and a lower surface that is flush with or below an upper surface of the conductive base; an insulating pipe that has an upper surface that is located below the wafer placement surface and a lower surface that is located below the lower surface of the porous plug; and an integrally formed member that is obtained by integrally forming the porous plug and the insulating pipe.
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公开(公告)号:US20230170191A1
公开(公告)日:2023-06-01
申请号:US17931916
申请日:2022-09-14
Applicant: NGK Insulators, Ltd.
Inventor: Seiya INOUE , Tatsuya KUNO , Ikuhisa MORIOKA
IPC: H01J37/32 , H01L21/683
CPC classification number: H01J37/32724 , H01L21/6833 , H01J2237/002 , H01J2237/2007
Abstract: A wafer placement table has a wafer placement surface that allows a wafer to be placed thereon. The wafer placement table includes a ceramic substrate having a built-in electrode, a cooling substrate including a refrigerant flow path, a metal joining layer that joins the ceramic substrate to the cooling substrate, and a plurality of small protrusions disposed on a reference plane of the wafer placement surface. The top surfaces of the small protrusions can support the lower surface of a wafer. The top surfaces of all the small protrusions are located on the same plane. In a flow path overlapping range of the wafer placement surface in which the wafer placement surface overlaps the refrigerant flow path in plan view, an area ratio of the small protrusions is minimized in a portion facing a most upstream portion of the refrigerant flow path.
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公开(公告)号:US20220124874A1
公开(公告)日:2022-04-21
申请号:US17305173
申请日:2021-07-01
Applicant: NGK INSULATORS, LTD.
Inventor: Seiya INOUE , Reo WATANABE , Yuma IWATA
IPC: H05B1/02 , H01L21/687 , H05B3/03 , H05B3/14 , H05B3/26
Abstract: A wafer placement table includes a ceramic plate, an electrode embedded in the ceramic plate, a hollow ceramic shaft attached to a surface of the ceramic plate, a power-supplying member running inside the ceramic shaft and connected to a terminal of the electrode, a plate-side attaching site defined on the ceramic plate and to which the power-supplying member is attached, a power-source-side attaching site defined at a free end of the ceramic shaft and to which the power-supplying member is attached, and a redirecting member provided inside the ceramic shaft. The power-source-side attaching site is defined in correspondence with the plate-side attaching site and in such a manner as to be shifted from the plate-side attaching site in plan view. The redirecting member holds the power-supplying member such that the power-supplying member extending from the power-source-side attaching site is forcibly redirected toward the plate-side attaching site.
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公开(公告)号:US20240186170A1
公开(公告)日:2024-06-06
申请号:US18346951
申请日:2023-07-05
Applicant: NGK INSULATORS, LTD.
Inventor: Natsuki HIRATA , Shinya YOSHIDA , Tatsuya KUNO , Seiya INOUE , Taro USAMI , Kenji YONEMOTO , Aoi SAITO
IPC: H01L21/683
CPC classification number: H01L21/6833
Abstract: A member for a semiconductor manufacturing apparatus includes: a ceramic plate that has a wafer placement surface at an upper surface thereof; a plug disposition hole that extends through the ceramic plate in an up-down direction and that has a truncated conical space whose upper opening is larger than a lower opening thereof; a truncated conical plug that is disposed in the plug disposition hole, that allows gas to flow in the up-down direction, and whose upper surface is larger than a lower surface thereof; an adhesive layer that is provided between the plug disposition hole and the truncated conical plug; an electrically conductive baseplate that is joined to a lower surface of the ceramic plate through a joint layer; and a gas supply path that is provided in the baseplate and the joint layer and that supplies gas to the truncated conical plug.
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公开(公告)号:US20230290622A1
公开(公告)日:2023-09-14
申请号:US18158021
申请日:2023-01-23
Applicant: NGK Insulators, Ltd.
Inventor: Hiroshi TAKEBAYASHI , Tatsuya KUNO , Seiya INOUE
IPC: H01J37/32 , H01L21/683 , H01L21/687
CPC classification number: H01J37/32724 , H01J37/32642 , H01L21/6833 , H01L21/68721 , H01J2237/002 , H01J2237/334 , H01J2237/2007
Abstract: A member for a semiconductor manufacturing apparatus, includes: a base substrate that has a wafer-placement-table support and a focus-ring-placement-table support; a focus-ring placement table that is joined to the focus-ring-placement-table support; a wafer placement table that is separate from the focus-ring placement table, that overlaps an inner peripheral portion of the focus-ring placement table in plan view, and that is joined to the inner peripheral portion of the focus-ring placement table and to the wafer-placement-table support; an internal space that is surrounded by a lower surface of the wafer placement table, an outer peripheral surface of the wafer-placement-table support, an inner peripheral surface of the focus-ring placement table, and an upper surface of the focus-ring-placement-table support; and a communication path that is provided at the base substrate and that causes the internal space and an outside of the base substrate to communicate with each other.
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公开(公告)号:US20230238258A1
公开(公告)日:2023-07-27
申请号:US17929043
申请日:2022-09-01
Applicant: NGK Insulators, Ltd.
Inventor: Seiya INOUE , Tatsuya KUNO
IPC: H01L21/67 , H01L21/687 , H01J37/32
CPC classification number: H01L21/67109 , H01L21/68785 , H01J37/32642 , H01J37/32724 , H01J37/32532
Abstract: A wafer placement table includes a ceramic base having a wafer placement surface on its top surface and incorporating an electrode, a cooling base provided on a bottom surface side of the ceramic base, and a refrigerant flow channel groove provided in the cooling base so as to open at a bottom surface of the cooling base.
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公开(公告)号:US20230223291A1
公开(公告)日:2023-07-13
申请号:US18048967
申请日:2022-10-24
Applicant: NGK Insulators, Ltd.
Inventor: Seiya INOUE , Tatsuya KUNO , Natsuki HIRATA
IPC: H01L21/683 , H01J37/32
CPC classification number: H01L21/6833 , H01J37/32724 , H01J37/3244 , H01J2237/2007
Abstract: A member for semiconductor manufacturing apparatus includes a ceramic plate that has an upper surface including a wafer placement surface and resin porous plugs that have upper surfaces that are exposed from the wafer placement surface. The resin porous plugs are press-fitted and secured in plug insertion holes that extend through the ceramic plate in an up-down direction and allow gas to flow.
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公开(公告)号:US20230144107A1
公开(公告)日:2023-05-11
申请号:US17818748
申请日:2022-08-10
Applicant: NGK Insulators, Ltd.
Inventor: Seiya INOUE , Tatsuya KUNO , Ikuhisa MORIOKA
IPC: H01L21/687 , H01L21/67
CPC classification number: H01L21/68757 , H01L21/67109
Abstract: A wafer placement table includes a ceramic base having a wafer placement surface on its top surface where a wafer is able to be placed and incorporating an electrode, a cooling base having a refrigerant flow channel, and a bonding layer that bonds the ceramic base with the cooling base, wherein in an area that overlaps the wafer placement surface in plan view of the refrigerant flow channel, a distance from a ceiling surface of the refrigerant flow channel to the wafer placement surface at a most downstream part of the refrigerant flow channel is shorter than the distance at a most upstream part of the refrigerant flow channel.
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