公开(公告)号：US08013379B2

公开(公告)日：2011-09-06

申请号：US12055747

申请日：2008-03-26

申请人： Toshiro Futatsugi

发明人： Toshiro Futatsugi

IPC分类号： H01L27/108 ,  H01L29/94

CPC分类号： H01L29/93 ,  H01L29/66075

摘要： The semiconductor variable capacitor includes a capacitor including an n-well 16 formed in a first region of a semiconductor substrate 10, an insulating film 18 formed over the semiconductor substrate 10 and a gate electrode 20n formed above the n-well 16 with the insulating film 18 interposed therebetween; and a p-well 14 of a second conduction type formed in a second region adjacent to the first region of the semiconductor substrate 10. The gate electrode 20n has an end which is extended to the second region and formed above the p-well 14 with the insulating film 18 interposed therebetween.

摘要翻译： 半导体可变电容器包括电容器，其包括形成在半导体衬底10的第一区域中的n阱16，形成在半导体衬底10上的绝缘膜18和形成在n阱16上方的栅电极20n，绝缘膜 18; 以及形成在与半导体衬底10的第一区域相邻的第二区域中的第二导电类型的p阱14.栅电极20n具有延伸到第二区域并在p阱14上方形成的端部， 绝缘膜18插入其间。

公开(公告)号：US06480420B2

公开(公告)日：2002-11-12

申请号：US09818652

申请日：2001-03-28

申请人： Toshiro Futatsugi

发明人： Toshiro Futatsugi

IPC分类号： G11C1604

CPC分类号： G11C16/0416 ,  G11C16/10 ,  G11C16/30

摘要： A semiconductor memory device having a plurality of memory cells, word lines and bit lines formed on a semiconductor substrate, where each of the memory cells includes a source area formed adjacent to a channel area in the semiconductor substrate; a drain area formed opposite the source area with the channel area therebetween in the semiconductor substrate, the drain area being connected to one of the bit lines; a tunnel insulating film formed on the channel area, the tunnel insulating film having a proper thickness for a carrier to pass through by a tunnel phenomenon; a floating gate formed on the tunnel insulating film so as to overlap neither the source area nor the drain area; a gate insulating film formed on the floating gate so as to cover the floating gate; and a control gate formed on the gate insulating film so as to partially overlap both of the source area and the drain area, the control gate being connected to one of the word lines. In the semiconductor memory device, the source areas of the memory cells are connected to each other so that a common voltage is supplied to each of the source areas.

摘要翻译： 一种半导体存储器件，具有形成在半导体衬底上的多个存储单元，字线和位线，其中每个存储单元包括与半导体衬底中的沟道区相邻形成的源区; 在所述半导体衬底中与所述源极区域相对地形成有沟槽区域的漏极区域，所述漏极区域连接到所述位线之一; 形成在通道区域上的隧道绝缘膜，所述隧道绝缘膜具有用于载体通过隧道现象穿过的适当厚度; 在所述隧道绝缘膜上形成的浮栅，以便不与所述源极区域和所述漏极区域重叠; 形成在所述浮动栅极上以覆盖所述浮动栅极的栅极绝缘膜; 以及形成在所述栅极绝缘膜上以便部分地重叠所述源极区域和所述漏极区域的控制栅极，所述控制栅极连接到所述字线之一。 在半导体存储器件中，存储单元的源极区域彼此连接，从而向每个源极区域提供公共电压。

公开(公告)号：US06294794B1

公开(公告)日：2001-09-25

申请号：US09018858

申请日：1998-02-04

申请人： Tetsuzo Yoshimura ,  Toshiro Futatsugi

发明人： Tetsuzo Yoshimura ,  Toshiro Futatsugi

IPC分类号： H01L2906

CPC分类号： B82Y10/00 ,  G02F1/35 ,  G02F2001/01791 ,  H01L29/127

摘要： A non-linear optical device includes a plurality of quantum dots in an active layer such that the quantum dots have a composition or doping modified asymmetric in a direction perpendicular to the active layer.

摘要翻译： 非线性光学器件包括有源层中的多个量子点，使得量子点具有在垂直于有源层的方向上不对称的组成或掺杂。

公开(公告)号：US4907196A

公开(公告)日：1990-03-06

申请号：US184222

申请日：1988-04-21

申请人： Toshihiko Mori ,  Toshiro Futatsugi

发明人： Toshihiko Mori ,  Toshiro Futatsugi

IPC分类号： G11C11/39

CPC分类号： B82Y10/00 ,  G11C11/39 ,  G11C2211/5614

摘要： A semiconductor memory device comprises a transistor having such a current characteristic that a base current has a differential negative resistance characteristic and a collector current greatly flows after the differential negative resistance characteristic occurs in the base current when a base-emitter voltage is increased, a load coupled in series between a collector and a base of the transistor, first and second input terminals coupled to the base of the transistor through a base resistance of the transistor, and an ouptut terminal coupled to the collector of the transistor.