公开(公告)号：US20170108545A1

公开(公告)日：2017-04-20

申请号：US15247165

申请日：2016-08-25

Applicant: FUJI ELECTRIC CO., LTD. ,  NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY

Inventor： Mitsuru SOMETANI ,  Manabu TAKEI ,  Shinsuke HARADA

IPC: G01R31/26 ,  H01L29/20 ,  H01L29/16 ,  H01L29/165 ,  H01L21/66 ,  H01L29/78

CPC classification number: G01R31/26 ,  G01R31/2621 ,  H01L22/34 ,  H01L29/1087 ,  H01L29/1602 ,  H01L29/1608 ,  H01L29/165 ,  H01L29/2003 ,  H01L29/78 ,  H01L29/7802 ,  H01L29/7813

Abstract: A method of evaluating a semiconductor device having an insulated gate formed of a metal-oxide film semiconductor. The semiconductor device has a high potential side and a low potential side, and a threshold voltage that is a minimum voltage for forming a conducting path between the high and low potential sides. The method includes determining a variation of the threshold voltage at turn-on of the semiconductor device by continuously applying an alternating current (AC) voltage to the gate of the semiconductor device, a maximum voltage of the AC voltage being equal to or higher than the threshold voltage of the semiconductor device.

公开(公告)号：US20160336224A1

公开(公告)日：2016-11-17

申请号：US15221678

申请日：2016-07-28

Applicant: FUJI ELECTRIC CO., LTD. ,  NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY

Inventor： Yoshiyuki SUGAHARA ,  Takashi TSUTSUMI ,  Youichi MAKIFUCHI ,  Tsuyoshi ARAOKA ,  Kenji FUKUDA ,  Shinsuke HARADA ,  Mitsuo OKAMOTO

IPC: H01L21/768 ,  H01L23/532 ,  H01L29/78 ,  H01L29/66 ,  H01L29/16 ,  H01L29/10

CPC classification number: H01L21/76883 ,  H01L21/045 ,  H01L21/0485 ,  H01L21/049 ,  H01L21/28 ,  H01L21/76846 ,  H01L23/53223 ,  H01L29/1095 ,  H01L29/12 ,  H01L29/1608 ,  H01L29/417 ,  H01L29/45 ,  H01L29/66068 ,  H01L29/78 ,  H01L29/7802

Abstract: A method of manufacturing a silicon carbide semiconductor device includes forming on a front surface of a silicon carbide substrate of a first conductivity type, a silicon carbide layer of the first conductivity type of a lower concentration; selectively forming a region of a second conductivity type in a surface portion of the silicon carbide layer; selectively forming a source region of the first conductivity type in the region; forming a source electrode electrically connected to the source region; forming a gate insulating film on a surface of the region between the silicon carbide layer and the source region; forming a gate electrode on the gate insulating film; forming a drain electrode on a rear surface of the substrate; forming metal wiring comprising aluminum for the device, the metal wiring being connected to the source electrode; and performing low temperature nitrogen annealing after the metal wiring is formed.

Abstract translation: 一种制造碳化硅半导体器件的方法包括在第一导电类型的碳化硅衬底的前表面上形成较低浓度的第一导电类型的碳化硅层; 在碳化硅层的表面部分中选择性地形成第二导电类型的区域; 在该区域中选择性地形成第一导电类型的源区; 形成与源极电连接的源电极; 在所述碳化硅层和所述源极区域之间的区域的表面上形成栅极绝缘膜; 在栅极绝缘膜上形成栅电极; 在所述基板的后表面上形成漏电极; 形成用于所述器件的铝的金属布线，所述金属布线连接到所述源电极; 并且在形成金属布线之后进行低温氮退火。

公开(公告)号：US20230100453A1

公开(公告)日：2023-03-30

申请号：US18071599

申请日：2022-11-29

Applicant: FUJI ELECTRIC CO., LTD. ,  NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY

Inventor： Takeshi TAWARA ,  Shinsuke HARADA

IPC: H01L29/10 ,  H01L29/16 ,  H01L29/167 ,  H01L29/78 ,  H01L29/872 ,  H01L21/02

Abstract: An n--type drift layer is an n--type epitaxial layer doped with nitrogen as an n-type dopant and is co-doped with aluminum as a p-type dopant, the n--type drift layer containing the nitrogen and aluminum substantially uniformly throughout. An n-type impurity concentration of the n--type drift layer is an impurity concentration determined by subtracting the aluminum concentration from the nitrogen concentration of the n--type drift layer; a predetermined blocking voltage is realized by the impurity concentration. A combined impurity concentration of the nitrogen and aluminum of the n--type drift layer is at least 3×1016/cm3.