公开(公告)号：US10908909B2

公开(公告)日：2021-02-02

申请号：US15155570

申请日：2016-05-16

Applicant: Optimum Semiconductor Technologies, Inc.

Inventor： Mayan Moudgill ,  Gary Nacer ,  C. John Glossner ,  Arthur Joseph Hoane ,  Paul Hurtley ,  Murugappan Senthilvelan

IPC: G06F9/30 ,  G06F9/38 ,  G06F9/46 ,  G06F9/48 ,  G06F9/455

Abstract: A computer processor may include a plurality of hardware threads. The computer processor may further include state processor logic for a state of a hardware thread. The state processor logic may include per thread logic that contains state that is replicated in each hardware thread of the plurality of hardware threads and common logic that is independent of each hardware thread of the plurality of hardware threads. The computer processor may further include single threaded mode logic to execute instructions in a single threaded mode from only one hardware thread of the plurality of hardware threads. The computer processor may further include second mode logic to execute instructions in a second mode from more than one hardware thread of the plurality of hardware threads simultaneously. The computer processor may further include switching mode logic to switch between the first mode and the second mode.

公开(公告)号：US10339095B2

公开(公告)日：2019-07-02

申请号：US14716285

申请日：2015-05-19

Applicant: Optimum Semiconductor Technologies, Inc.

Inventor： Mayan Moudgill ,  Gary J. Nacer ,  C. John Glossner ,  Arthur Joseph Hoane ,  Paul Hurtley ,  Murugappan Senthilvelan ,  Pablo Balzola ,  Vitaly Kalashnikov ,  Sitij Agrawal

IPC: G06F9/30 ,  G06F15/80 ,  G06F9/38 ,  G06F17/14 ,  G06F15/78

Abstract: A computer processor is disclosed. The computer processor comprises a vector unit comprising a vector register file comprising one or more registers to hold a varying number of elements. The computer processor further comprises processing logic configured to operate on the varying number of elements in the vector register file using one or more digital signal processing instructions. The computer processor may be implemented as a monolithic integrated circuit.

公开(公告)号：US10339094B2

公开(公告)日：2019-07-02

申请号：US14716216

申请日：2015-05-19

Applicant: Optimum Semiconductor Technologies, Inc.

Inventor： Mayan Moudgill ,  Gary J. Nacer ,  C. John Glossner ,  Arthur Joseph Hoane ,  Paul Hurtley ,  Murugappan Senthilvelan ,  Pablo Balzola ,  Vitaly Kalashnikov ,  Sitij Agrawal

IPC: G06F9/38 ,  G06F9/46 ,  G06F15/76 ,  G06F15/80 ,  G06F9/30 ,  G06F17/14 ,  G06F15/78

Abstract: A computer processor is disclosed. The computer processor comprises one or more processor resources. The computer processor further comprises a plurality of hardware thread units coupled to the one or more processor resources. The computer processor may be configured to permit simultaneous access to the one or more processor resources by only a subset of hardware thread units of the plurality of hardware thread units. The number of hardware threads in the subset may be less than the total number of hardware threads of the plurality of hardware thread units.

公开(公告)号：US20160224513A1

公开(公告)日：2016-08-04

申请号：US14718740

申请日：2015-05-21

Applicant: Optimum Semiconductor Technologies, Inc.

Inventor： Mayan Moudgill ,  Gary J. Nacer ,  C. John Glossner ,  Arthur Joseph Hoane ,  Murugappan Senthilvelan ,  Pablo Balzola

IPC: G06F15/80 ,  G06F9/30 ,  G06F9/38

CPC classification number: G06F15/8053 ,  G06F9/3001 ,  G06F9/30021 ,  G06F9/30036 ,  G06F9/30101 ,  G06F9/30109 ,  G06F9/30112 ,  G06F9/30141 ,  G06F9/3836 ,  G06F9/3855 ,  G06F9/461 ,  G06F9/462 ,  G06F15/7828 ,  G06F15/7839 ,  G06F15/8076 ,  G06F17/142

Abstract: A computer processor is disclosed. The computer processor comprise a vector unit comprising a vector register file comprising at least one vector register to hold a varying number of elements. The computer processor further comprises out-of-order issue logic that holds a pool of vector instructions, selects a vector instruction from the pool, and sends the vector instruction for execution. The vector instruction operates on the varying number of elements of the at least one vector register.

Abstract translation: 公开了一种计算机处理器。 计算机处理器包括矢量单元，其包括矢量寄存器文件，该矢量寄存器文件包括至少一个矢量寄存器以保存不同数量的元件。 计算机处理器还包括保存向量指令池的无序发行逻辑，从池中选择向量指令，并发送用于执行的向量指令。 向量指令对至少一个向量寄存器的元素的变化数量进行操作。

公开(公告)号：US20160224512A1

公开(公告)日：2016-08-04

申请号：US14709730

申请日：2015-05-12

Applicant: Optimum Semiconductor Technologies, Inc.

Inventor： Mayan Moudgill ,  Gary J. Nacer ,  C. John Glossner ,  Arthur Joseph Hoane ,  Paul Hurtley ,  Murugappan Senthilvelan ,  Pablo Balzola ,  Vitaly Kalashnikov ,  Sitij Agrawal

IPC: G06F15/80 ,  G06F9/38 ,  G06F9/30

CPC classification number: G06F15/8053 ,  G06F9/3001 ,  G06F9/30021 ,  G06F9/30036 ,  G06F9/30101 ,  G06F9/30109 ,  G06F9/30112 ,  G06F9/30141 ,  G06F9/3836 ,  G06F9/3855 ,  G06F9/461 ,  G06F9/462 ,  G06F15/7828 ,  G06F15/7839 ,  G06F15/8076 ,  G06F17/142

Abstract: A computer processor comprising a vector unit is disclosed. The vector unit may comprise a vector register file comprising at least one register to hold a varying number of elements. The vector unit may further comprise a vector length register file comprising at least one register to specify the number of operations of a vector instruction to be performed on the varying number of elements in the at least one register of the vector register file. The computer processor may be implemented as a monolithic integrated circuit.

Abstract translation: 公开了一种包括向量单元的计算机处理器。 向量单元可以包括向量寄存器文件，其包括至少一个寄存器以保存不同数量的元素。 向量单元还可以包括向量长度寄存器文件，其包括至少一个寄存器，用于指定要对向量寄存器堆的至少一个寄存器中的变化数量的元素执行的向量指令的操作次数。 计算机处理器可以被实现为单片集成电路。

公开(公告)号：US20160224511A1

公开(公告)日：2016-08-04

申请号：US14728522

申请日：2015-06-02

Applicant: Optimum Semiconductor Technologies, Inc.

Inventor： Mayan Moudgill ,  C. John Glossner ,  Arthur Joseph Hoane ,  Paul Hurtley ,  Vitaly Kalashnikov

IPC: G06F15/80 ,  G06F9/30

CPC classification number: G06F15/8053 ,  G06F9/3001 ,  G06F9/30021 ,  G06F9/30036 ,  G06F9/30101 ,  G06F9/30109 ,  G06F9/30112 ,  G06F9/30141 ,  G06F9/3836 ,  G06F9/3855 ,  G06F15/7828 ,  G06F15/7839 ,  G06F15/8076 ,  G06F17/142

Abstract: A computer processor is disclosed. The computer processor may comprise a vector unit comprising a vector register file comprising one or more registers to hold a varying number of elements. The computer processor may further comprise processing logic configured to implicitly type each of the varying number of elements in the vector register file. The computer processor may be implemented as a monolithic integrated circuit.

Abstract translation: 公开了一种计算机处理器。 计算机处理器可以包括矢量单元，其包括矢量寄存器文件，其包括一个或多个寄存器以保存不同数量的元件。 计算机处理器还可以包括处理逻辑，其被配置为隐含地对向量寄存器文件中的各种变化数量的元素进行键入。 计算机处理器可以被实现为单片集成电路。

公开(公告)号：US20160224509A1

公开(公告)日：2016-08-04

申请号：US14716216

申请日：2015-05-19

Applicant: Optimum Semiconductor Technologies, Inc.

Inventor： Mayan Moudgill ,  Gary J. Nacer ,  C. John Glossner ,  Arthur Joseph Hoane ,  Paul Hurtley ,  Murugappan Senthilvelan ,  Pablo Balzola ,  Vitaly Kalashnikov ,  Sitij Agrawal

IPC: G06F15/80

CPC classification number: G06F15/8053 ,  G06F9/3001 ,  G06F9/30021 ,  G06F9/30036 ,  G06F9/30101 ,  G06F9/30109 ,  G06F9/30112 ,  G06F9/30141 ,  G06F9/3836 ,  G06F9/3855 ,  G06F9/461 ,  G06F9/462 ,  G06F15/7828 ,  G06F15/7839 ,  G06F15/8076 ,  G06F17/142

Abstract: A computer processor is disclosed. The computer processor comprises one or more processor resources. The computer processor further comprises a plurality of hardware thread units coupled to the one or more processor resources. The computer processor may be configured to permit simultaneous access to the one or more processor resources by only a subset of hardware thread units of the plurality of hardware thread units. The number of hardware threads in the subset may be less than the total number of hardware threads of the plurality of hardware thread units.

Abstract translation: 公开了一种计算机处理器。 计算机处理器包括一个或多个处理器资源。 计算机处理器还包括耦合到一个或多个处理器资源的多个硬件线程单元。 计算机处理器可以被配置为仅通过多个硬件线程单元中的硬件线程单元的子集来同时访问一个或多个处理器资源。 子集中的硬件线程的数量可以小于多个硬件线程单元中的硬件线程的总数。

公开(公告)号：US20160224346A1

公开(公告)日：2016-08-04

申请号：US14727076

申请日：2015-06-01

Applicant: Optimum Semiconductor Technologies, Inc.

Inventor： Mayan Moudgill ,  Gary J. Nacer ,  C. John Glossner ,  Arthur Joseph Hoane ,  Paul Hurtley ,  Murugappan Senthilvelan ,  Pablo Balzola

IPC: G06F9/30 ,  G06F15/78

CPC classification number: G06F15/8053 ,  G06F9/3001 ,  G06F9/30021 ,  G06F9/30036 ,  G06F9/30101 ,  G06F9/30109 ,  G06F9/30112 ,  G06F9/30141 ,  G06F9/3836 ,  G06F9/3855 ,  G06F15/7828 ,  G06F15/7839 ,  G06F15/8076 ,  G06F17/142

Abstract: A computer processor is disclosed. The computer processor may comprise a vector unit comprising a vector register file comprising at least one register to hold a varying number of elements. The computer processor may further comprise processing logic configured to operate on the varying number of elements in the vector register file using one or more instructions that separate a vector or combine two vectors. The computer processor may be implemented as a monolithic integrated circuit.

Abstract translation: 公开了一种计算机处理器。 计算机处理器可以包括向量单元，其包括向量寄存器文件，其包括至少一个寄存器以保存不同数量的元件。 计算机处理器还可以包括处理逻辑，其被配置为使用分离向量或组合两个向量的一个或多个指令对向量寄存器文件中的变化数量的元素进行操作。 计算机处理器可以被实现为单片集成电路。

公开(公告)号：US20160224345A1

公开(公告)日：2016-08-04

申请号：US14727051

申请日：2015-06-01

Applicant: Optimum Semiconductor Technologies, Inc.

Inventor： Mayan Moudgill ,  Arthur Joseph Hoane ,  Paul Hurtley

IPC: G06F9/30 ,  G06F15/78

CPC classification number: G06F15/8053 ,  G06F9/3001 ,  G06F9/30021 ,  G06F9/30036 ,  G06F9/30101 ,  G06F9/30109 ,  G06F9/30112 ,  G06F9/30141 ,  G06F9/3836 ,  G06F9/3855 ,  G06F9/461 ,  G06F9/462 ,  G06F15/7828 ,  G06F15/7839 ,  G06F15/8076 ,  G06F17/142

Abstract: A computer processor is disclosed. The computer processor may comprises a vector unit comprising a vector register file comprising at least one register to hold a varying number of elements. The computer processor may further comprise processing logic configured to operate on the varying number of elements in the vector register file using one or more instructions that produce results with elements of widths different than that of the input elements. The computer processor may be implemented as a monolithic integrated circuit.

Abstract translation: 公开了一种计算机处理器。 计算机处理器可以包括矢量单元，其包括矢量寄存器文件，该矢量寄存器文件包括至少一个寄存器以保存不同数量的元件。 计算机处理器还可以包括处理逻辑，其被配置为使用产生具有与输入元素的宽度不同的元素的结果的一个或多个指令对向量寄存器文件中的变化数量的元素进行操作。 计算机处理器可以被实现为单片集成电路。

公开(公告)号：US20160224344A1

公开(公告)日：2016-08-04

申请号：US14716285

申请日：2015-05-19

Applicant: Optimum Semiconductor Technologies, Inc.

Inventor： Mayan Moudgill ,  Gary J. Nacer ,  C. John Glossner ,  Arthur Joseph Hoane ,  Paul Hurtley ,  Murugappan Senthilvelan ,  Pablo Balzola ,  Vitaly Kalashnikov ,  Sitij Agrawal

IPC: G06F9/30 ,  G06F15/78

CPC classification number: G06F15/8053 ,  G06F9/3001 ,  G06F9/30021 ,  G06F9/30036 ,  G06F9/30101 ,  G06F9/30109 ,  G06F9/30112 ,  G06F9/30141 ,  G06F9/3836 ,  G06F9/3855 ,  G06F9/461 ,  G06F9/462 ,  G06F15/7828 ,  G06F15/7839 ,  G06F15/8076 ,  G06F17/142

Abstract: A computer processor is disclosed. The computer processor comprises a vector unit comprising a vector register file comprising one or more registers to hold a varying number of elements. The computer processor further comprises processing logic configured to operate on the varying number of elements in the vector register file using one or more digital signal processing instructions. The computer processor may be implemented as a monolithic integrated circuit.

Abstract translation: 公开了一种计算机处理器。 计算机处理器包括矢量单元，其包括矢量寄存器文件，该矢量寄存器文件包括一个或多个寄存器以保存不同数量的元件。 计算机处理器还包括处理逻辑，其被配置为使用一个或多个数字信号处理指令对矢量寄存器文件中的变化数量的元件进行操作。 计算机处理器可以被实现为单片集成电路。