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1.发明申请VECTOR PROCESSOR CONFIGURED TO OPERATE ON VARIABLE LENGTH VECTORS USING ONE OR MORE COMPLEX ARITHMETIC INSTRUCTIONS 审中-公开使用一个或多个复杂算术指令配置在可变长度向量上运行的矢量处理器公开(公告)号：US20160224340A1
公开(公告)日：2016-08-04
申请号：US14724061
申请日：2015-05-28
Applicant: Optimum Semiconductor Technologies, Inc.
Inventor： Mayan Moudgill , Gary J. Nacer , C. John Glossner , Arthur Joseph Hoane , Sitij Agrawal
IPC: G06F9/30
CPC classification number: G06F15/8053 , G06F9/3001 , G06F9/30021 , G06F9/30036 , G06F9/30101 , G06F9/30109 , G06F9/30112 , G06F9/30141 , G06F9/3836 , G06F9/3855 , G06F9/461 , G06F9/462 , G06F15/7828 , G06F15/7839 , G06F15/8076 , G06F17/142
Abstract: A computer processor is disclosed. The computer processor may comprise a vector unit comprising a vector register file comprising at least one register to hold a varying number of elements. The computer processor may further comprise processing logic configured to operate on the varying number of elements in the vector register file using one or more complex arithmetic instructions. The computer processor may be implemented as a monolithic integrated circuit.
Abstract translation: 公开了一种计算机处理器。 计算机处理器可以包括向量单元，其包括向量寄存器文件，其包括至少一个寄存器以保存不同数量的元件。 计算机处理器还可以包括处理逻辑，其被配置为使用一个或多个复数运算指令对矢量寄存器堆中的变化数量的元件进行操作。 计算机处理器可以被实现为单片集成电路。
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公开(公告)号：US10824586B2
公开(公告)日：2020-11-03
申请号：US14724061
申请日：2015-05-28
Applicant: Optimum Semiconductor Technologies, Inc.
Inventor： Mayan Moudgill , Gary J. Nacer , C. John Glossner , Arthur Joseph Hoane , Sitij Agrawal
Abstract: A computer processor is disclosed. The computer processor may comprise a vector unit comprising a vector register file comprising at least one register to hold a varying number of elements. The computer processor may further comprise processing logic configured to operate on the varying number of elements in the vector register file using one or more complex arithmetic instructions. The computer processor may be implemented as a monolithic integrated circuit.
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3.发明申请VECTOR PROCESSOR CONFIGURED TO OPERATE ON VARIABLE LENGTH VECTORS USING GRAPHICS PROCESSING INSTRUCTIONS 审中-公开使用图形处理指令配置可变长度矢量图的矢量处理器公开(公告)号：US20160224510A1
公开(公告)日：2016-08-04
申请号：US14718432
申请日：2015-05-21
Applicant: Optimum Semiconductor Technologies, Inc.
Inventor： Mayan Moudgill , Gary J. Nacer , C. John Glossner , Arthur Joseph Hoane , Vitaly Kalashnikov , Sitij Agrawal
CPC classification number: G06F15/8053 , G06F9/3001 , G06F9/30021 , G06F9/30036 , G06F9/30101 , G06F9/30109 , G06F9/30112 , G06F9/30141 , G06F9/3836 , G06F9/3855 , G06F9/461 , G06F9/462 , G06F15/7828 , G06F15/7839 , G06F15/8076 , G06F17/142
Abstract: A computer processor is disclosed. The computer processor may comprise a vector unit comprising a vector register file comprising at least one register to hold a varying number of elements. The computer processor may further comprise processing logic configured to operate on the varying number of elements in the vector register file using one or more graphics processing instructions. The computer processor may be implemented as a monolithic integrated circuit.
Abstract translation: 公开了一种计算机处理器。 计算机处理器可以包括向量单元，其包括向量寄存器文件，其包括至少一个寄存器以保存不同数量的元件。 计算机处理器还可以包括处理逻辑，其被配置为使用一个或多个图形处理指令对向量寄存器堆中的变化数量的元件进行操作。 计算机处理器可以被实现为单片集成电路。
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公开(公告)号：US12050910B2
公开(公告)日：2024-07-30
申请号：US17427832
申请日：2020-02-20
Applicant: Optimum Semiconductor Technologies Inc.
Inventor： Mayan Moudgill , Pablo Balzola , Murugappan Senthivelan , Vaidyanathan Ramdurai , Sitij Agrawal
CPC classification number: G06F9/3001 , G06F7/5446 , G06F7/548 , G06F9/3013 , G06F17/17 , G06F5/01
Abstract: A system and an accelerator circuit including a register file comprising instruction registers to store a trigonometric calculation instruction for evaluating a trigonometric function, and data registers comprising a first data register to store a floating-point input value associated with the trigonometric calculation instruction. The accelerator circuit further includes a determination circuit to identify the trigonometric calculation function and the floating-point input value associated with the trigonometric calculation instruction and determine whether the floating-point input value is in a small value range, and an approximation circuit to responsive to determining that the floating-point input value is in the small value, receive the floating-point input value and calculate an approximation of the trigonometric function with respect to the input value.
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5.发明授权公开(公告)号：US11928465B2
公开(公告)日：2024-03-12
申请号：US17427843
申请日：2020-02-20
Applicant: Optimum Semiconductor Technologies Inc.
Inventor： Mayan Moudgill , Pablo Balzola , Murugappan Senthivelan , Vaidyanathan Ramdurai , Sitij Agrawal
CPC classification number: G06F9/3001 , G06F7/5446 , G06F7/548 , G06F9/3013 , G06F17/17 , G06F5/01
Abstract: A system and an accelerator circuit including a register file comprising instruction registers to store an instruction for evaluating an elementary function, and data registers comprising a first data register to store an input value. The accelerator circuit further includes a successive cumulative rotation circuit comprising a reconfigurable inner stage to perform a successive cumulative rotation recurrence, and a determination circuit to determine a type of the elementary function based on the instruction, and responsive to determining that the input value is a fixed-point number, configure the reconfigurable inner stage to a configuration for evaluating the type of the elementary function, wherein the successive cumulative rotation circuit is to calculate an evaluation of the elementary function using the reconfigurable inner stage performing the successive cumulative rotation recurrence.
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Patent Agency Ranking
6.发明授权公开(公告)号：US10922267B2
公开(公告)日：2021-02-16
申请号：US14718432
申请日：2015-05-21
Applicant: Optimum Semiconductor Technologies, Inc.
Inventor： Mayan Moudgill , Gary J. Nacer , C. John Glossner , Arthur Joseph Hoane , Vitaly Kalashnikov , Sitij Agrawal
Abstract: A computer processor is disclosed. The computer processor may comprise a vector unit comprising a vector register file comprising at least one register to hold a varying number of elements. The computer processor may further comprise processing logic configured to operate on the varying number of elements in the vector register file using one or more graphics processing instructions. The computer processor may be implemented as a monolithic integrated circuit.
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公开(公告)号：US11544214B2
公开(公告)日：2023-01-03
申请号：US14709730
申请日：2015-05-12
Applicant: Optimum Semiconductor Technologies, Inc.
Inventor： Mayan Moudgill , Gary J. Nacer , C. John Glossner , Arthur Joseph Hoane , Paul Hurtley , Murugappan Senthilvelan , Pablo Balzola , Vitaly Kalashnikov , Sitij Agrawal
Abstract: A computer processor comprising a vector unit is disclosed. The vector unit may comprise a vector register file comprising at least one register to hold a varying number of elements. The vector unit may further comprise a vector length register file comprising at least one register to specify the number of operations of a vector instruction to be performed on the varying number of elements in the at least one register of the vector register file. The computer processor may be implemented as a monolithic integrated circuit.
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公开(公告)号：US10339095B2
公开(公告)日：2019-07-02
申请号：US14716285
申请日：2015-05-19
Applicant: Optimum Semiconductor Technologies, Inc.
Inventor： Mayan Moudgill , Gary J. Nacer , C. John Glossner , Arthur Joseph Hoane , Paul Hurtley , Murugappan Senthilvelan , Pablo Balzola , Vitaly Kalashnikov , Sitij Agrawal
Abstract: A computer processor is disclosed. The computer processor comprises a vector unit comprising a vector register file comprising one or more registers to hold a varying number of elements. The computer processor further comprises processing logic configured to operate on the varying number of elements in the vector register file using one or more digital signal processing instructions. The computer processor may be implemented as a monolithic integrated circuit.
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9.发明授权公开(公告)号：US10339094B2
公开(公告)日：2019-07-02
申请号：US14716216
申请日：2015-05-19
Applicant: Optimum Semiconductor Technologies, Inc.
Inventor： Mayan Moudgill , Gary J. Nacer , C. John Glossner , Arthur Joseph Hoane , Paul Hurtley , Murugappan Senthilvelan , Pablo Balzola , Vitaly Kalashnikov , Sitij Agrawal
Abstract: A computer processor is disclosed. The computer processor comprises one or more processor resources. The computer processor further comprises a plurality of hardware thread units coupled to the one or more processor resources. The computer processor may be configured to permit simultaneous access to the one or more processor resources by only a subset of hardware thread units of the plurality of hardware thread units. The number of hardware threads in the subset may be less than the total number of hardware threads of the plurality of hardware thread units.
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10.发明申请MONOLITHIC VECTOR PROCESSOR CONFIGURED TO OPERATE ON VARIABLE LENGTH VECTORS 审中-公开配置为可变长度矢量图的单片矢量处理器公开(公告)号：US20160224512A1
公开(公告)日：2016-08-04
申请号：US14709730
申请日：2015-05-12
Applicant: Optimum Semiconductor Technologies, Inc.
Inventor： Mayan Moudgill , Gary J. Nacer , C. John Glossner , Arthur Joseph Hoane , Paul Hurtley , Murugappan Senthilvelan , Pablo Balzola , Vitaly Kalashnikov , Sitij Agrawal
CPC classification number: G06F15/8053 , G06F9/3001 , G06F9/30021 , G06F9/30036 , G06F9/30101 , G06F9/30109 , G06F9/30112 , G06F9/30141 , G06F9/3836 , G06F9/3855 , G06F9/461 , G06F9/462 , G06F15/7828 , G06F15/7839 , G06F15/8076 , G06F17/142
Abstract: A computer processor comprising a vector unit is disclosed. The vector unit may comprise a vector register file comprising at least one register to hold a varying number of elements. The vector unit may further comprise a vector length register file comprising at least one register to specify the number of operations of a vector instruction to be performed on the varying number of elements in the at least one register of the vector register file. The computer processor may be implemented as a monolithic integrated circuit.
Abstract translation: 公开了一种包括向量单元的计算机处理器。 向量单元可以包括向量寄存器文件，其包括至少一个寄存器以保存不同数量的元素。 向量单元还可以包括向量长度寄存器文件，其包括至少一个寄存器，用于指定要对向量寄存器堆的至少一个寄存器中的变化数量的元素执行的向量指令的操作次数。 计算机处理器可以被实现为单片集成电路。
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