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    INTEGRATED CIRCUIT CURRENT METERING USING VOLTAGE VARIATION DETECTION CIRCUIT
    11.
    发明申请
    INTEGRATED CIRCUIT CURRENT METERING USING VOLTAGE VARIATION DETECTION CIRCUIT 审中-公开

    公开(公告)号：US20180284867A1

    公开(公告)日：2018-10-04

    申请号：US15474635

    申请日：2017-03-30

    Applicant: Oracle International Corporation

    Inventor： Yifan YangGong ,  Sebastian Turullols ,  Vijay Srinivasan

    IPC: G06F1/32

    CPC classification number: G06F1/3206 ,  G06F1/324 ,  G06F1/3296

    Abstract: An apparatus is disclosed, including a monitoring circuit, a translation circuit, a first filter circuit, a second filter circuit, and an interface. The monitoring circuit may be configured to receive a plurality of code values indicative of a voltage level of a power supply signal. The translation circuit may be configured to translate a particular code value to a corresponding voltage value of a plurality of voltage values. The first filter circuit may be configured to filter one or more of the plurality of voltage values to generate a plurality of filtered voltage values. The second filter circuit may be configured to generate a plurality of current values using one or more of the plurality of filtered voltage values and based on an impulse response of the power supply signal. The interface may be configured to send one or more of the plurality of current values to a functional circuit.

    TEMPERATURE BASED FREQUENCY THROTTLING
    14.
    发明申请
    TEMPERATURE BASED FREQUENCY THROTTLING 有权

    公开(公告)号：US20210247824A1

    公开(公告)日：2021-08-12

    申请号：US17240475

    申请日：2021-04-26

    Applicant: Oracle International Corporation

    Inventor： Yifan YangGong ,  Sebastian Turullols

    IPC: G06F1/20 ,  G06F1/324 ,  G06F1/3296 ,  G06F1/3234

    Abstract: A power management controller is disclosed. Broadly speaking, the controller may, in response to receiving a timing signal, monitor a temperature of an integrated circuit including multiple processor clusters. The controller may generate a comparison of the temperature and a threshold value, and in response to a determination that the comparison indicates that the temperature is less than the threshold value, transition a particular processor cluster to a new power state.

    TEMPERATURE BASED FREQUENCY THROTTLING
    16.
    发明申请
    TEMPERATURE BASED FREQUENCY THROTTLING 审中-公开

    公开(公告)号：US20190354150A1

    公开(公告)日：2019-11-21

    申请号：US16525528

    申请日：2019-07-29

    Applicant: Oracle International Corporation

    Inventor： Yifan YangGong ,  Sebastian Turullols

    IPC: G06F1/20 ,  G06F1/3296 ,  G06F1/3234 ,  G06F1/324

    Abstract: A power management controller is disclosed. Broadly speaking, the controller may, in response to receiving a timing signal, monitor a temperature of an integrated circuit including multiple processor clusters. The controller may generate a comparison of the temperature and a threshold value, and in response to a determination that the comparison indicates that the temperature is less than the threshold value, transition a particular processor cluster to a new power state.

    POWER MANAGEMENT IN AN INTEGRATED CIRCUIT
    17.
    发明申请
    POWER MANAGEMENT IN AN INTEGRATED CIRCUIT 审中-公开

    公开(公告)号：US20190011971A1

    公开(公告)日：2019-01-10

    申请号：US15645528

    申请日：2017-07-10

    Applicant: Oracle International Corporation

    Inventor： Yifan YangGong ,  Sebastian Turullols

    IPC: G06F1/32

    Abstract: A power management controller is disclosed. Broadly speaking, the controller may, in response to detecting a timing signal, determine a total power consumption for a plurality of processor clusters, each of which includes a plurality of processor cores. The controller may determine a performance metric using the total power consumption and compare the performance metric to a limit. Based on a result of the comparison, the controller may select a new power state for at least one of the processor clusters.

    System and method for managing power in a chip multiprocessor using a proportional feedback mechanism
    18.
    发明授权
    System and method for managing power in a chip multiprocessor using a proportional feedback mechanism 有权
    使用比例反馈机制来管理芯片多处理器中的电源的系统和方法

    公开(公告)号：US09507405B2

    公开(公告)日：2016-11-29

    申请号：US14308079

    申请日：2014-06-18

    Applicant: Oracle International Corporation

    Inventor： Venkatram Krishnaswamy ,  Georgios K Konstadinidis ,  Sebastian Turullols ,  Yifan YangGong

    IPC: G06F1/32

    CPC classification number: G06F1/324 ,  G06F1/3243 ,  Y02D10/126 ,  Y02D10/152

    Abstract: A system includes a power management unit that may monitor the power consumed by a processor including a plurality of processor core. The power management unit may throttle or reduce the operating frequency of the processor cores by applying a number of throttle events in response to determining that the plurality of cores is operating above a predetermined power threshold during a given monitoring cycle. The number of throttle events may be based upon a relative priority of each of the plurality of processor cores to one another and an amount that the processor is operating above the predetermined power threshold. The number of throttle events may correspond to a portion of a total number of throttle events, and which may be dynamically determined during operation based upon a proportionality constant and the difference between the total power consumed by the processor and a predetermined power threshold.

    Abstract translation: 一种系统包括能够监视包括多个处理器核心的处理器消耗的功率的电力管理单元。 电源管理单元可以通过施加多个节气门事件来响应于在给定的监视循环期间确定多个核在高于预定功率阈值的情况下运行，来节流或降低处理器核心的工作频率。 油门事件的数量可以基于多个处理器核心中的每一个相对于彼此的相对优先级，以及处理器在高于预定功率阈值的情况下操作的量。 节气门事件的数量可以对应于节气门事件总数的一部分，并且其可以在操作期间基于比例常数和处理器消耗的总功率与预定功率阈值之间的差异来动态地确定。

    Load line compensation in power monitoring
    19.
    发明授权
    Load line compensation in power monitoring 有权

    公开(公告)号：US11762444B2

    公开(公告)日：2023-09-19

    申请号：US17388830

    申请日：2021-07-29

    Applicant: Oracle International Corporation

    Inventor： Lin Zhang ,  Yifan YangGong ,  Sebastian Turullols

    IPC: G06F1/28 ,  G06F1/08

    CPC classification number: G06F1/28 ,  G06F1/08

    Abstract: A method for determining power dissipation within a computer system is disclosed. A circuit block may receive a regulated voltage level on a power supply signal generated by a voltage regulator circuit. A power control circuit may measure a current drawn by the circuit block, and determine a real-time voltage level for the power supply signal using the current and based on a slope value and a zero-load voltage level. Additionally, power control circuit may determine a power dissipation for the circuit block using the current and the real-time voltage level, and adjust an operation parameter of the circuit block based on the power dissipation.

    LOAD LINE COMPENSATION IN POWER MONITORING
    20.
    发明申请
    LOAD LINE COMPENSATION IN POWER MONITORING 审中-公开

    公开(公告)号：US20190332153A1

    公开(公告)日：2019-10-31

    申请号：US15965963

    申请日：2018-04-29

    Applicant: Oracle International Corporation

    Inventor： Lin Zhang ,  Yifan YangGong ,  Sebastian Turullols

    IPC: G06F1/28 ,  G06F1/08

    Abstract: A method for determining power dissipation within a computer system is disclosed. A circuit block may receive a regulated voltage level on a power supply signal generated by a voltage regulator circuit. A power control circuit may measure a current drawn by the circuit block, and determine a real-time voltage level for the power supply signal using the current and based on a slope value and a zero-load voltage level. Additionally, power control circuit may determine a power dissipation for the circuit block using the current and the real-time voltage level, and adjust an operation parameter of the circuit block based on the power dissipation.

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