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公开(公告)号：US10162540B2
公开(公告)日：2018-12-25
申请号：US15380509
申请日：2016-12-15
Applicant: Proton World International N.V.
Inventor： Michel Dawirs , Jean-Louis Modave , Michael Peeters , Guillaume Docquier
Abstract: A flash memory is divided into pages defining an erase granularity of the flash memory. A count value is written into page metadata. Each page is divided into frames. Each frame contains at least one data block and at least two frame metadata words including a first frame metadata word to store a block identifier. A current page is opened by incrementing the count value and writing the incremented count value into the at least one first page metadata word. The current page has its at least one first page metadata word containing a highest count value of the counter of the number of written pages. A logic data block is written into a selected frame and a block identifier of the logic data block is written into the first frame metadata word of the selected frame.
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12.发明授权公开(公告)号：US09870489B2
公开(公告)日：2018-01-16
申请号：US14970161
申请日：2015-12-15
Inventor： Jean-Louis Modave , Fabrice Marinet , Denis Farison
Abstract: A method of authenticating a slave device. The method includes initializing, by a host device, a charge retention circuit of the slave device, and receiving, by the host device, an indication of a discharge time of the charge retention circuit. The host device authenticates the slave device based on the received indication of the discharge time of the charge retention device.
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公开(公告)号：US20170336996A1
公开(公告)日：2017-11-23
申请号：US15380509
申请日：2016-12-15
Applicant: Proton World International N.V.
Inventor： Michel Dawirs , Jean-Louis Modave , Michael Peeters , Guillaume Docquier
CPC classification number: G06F3/0619 , G06F3/064 , G06F3/0679 , G06F11/1004 , G06F12/0246 , G06F2212/1036 , G06F2212/7204 , G06F2212/7207 , G06F2212/7209
Abstract: A flash memory management method, including: the data to be stored are organized in logic blocks; the memory is divided into pages; each page is divided into frames, each frame being capable of containing at least one data block and at least two frame metadata words; each page comprises at least one page metadata word which contains, when a page is written, a value of a counter of the number of written pages; a writing of a logic block into the memory goes along with a programming of a first frame metadata word with an identifier of this logic block; and the page into which the writing is to be performed is selected as being that having its first metadata word containing the maximum value of the counter of written pages from among all pages.
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公开(公告)号：US09008260B2
公开(公告)日：2015-04-14
申请号：US14099732
申请日：2013-12-06
Applicant: Proton World International N.V.
Inventor： Michel Dawirs , Jean-Louis Modave
CPC classification number: H03K21/00 , G11C16/349 , H03K21/403
Abstract: A counter in a non-volatile memory including at least two sub-counters, each counting with a different modulo, an increment of the counter being transferred on a single one of the sub-counters and the sub-counters being incremented sequentially.
Abstract translation: 包括至少两个子计数器的非易失性存储器中的计数器，每个子计数器以不同的模计数，在一个子计数器和子计数器上传送的计数器的增量依次递增。
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公开(公告)号：US12045334B2
公开(公告)日：2024-07-23
申请号：US18305695
申请日：2023-04-24
Applicant: PROTON WORLD INTERNATIONAL N.V.
Inventor： Jean-Louis Modave , Michael Peeters
Abstract: The present disclosure relates to an authentication method of a first device by a second device, each first, second device having a processor, at least one memory, and an authentication circuit, in which the authentication circuit is configured to prohibit the processor from reading data stored in at least part of said memory. The authenticating includes generating a first datum, and a second datum. The second device verifies that the first and second data match.
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Patent Agency Ranking
公开(公告)号：US11669610B2
公开(公告)日：2023-06-06
申请号：US17224013
申请日：2021-04-06
Applicant: PROTON WORLD INTERNATIONAL N.V.
Inventor： Jean-Louis Modave , Michael Peeters
Abstract: The present disclosure relates to an authentication method of a first device by a second device, each first, second device having a processor, at least one memory, and an authentication circuit, in which the authentication circuit is configured to prohibit the processor from reading data stored in at least part of said memory. The authenticating includes generating a first datum, and a second datum. The second device verifies that the first and second data match.
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公开(公告)号：US11669392B2
公开(公告)日：2023-06-06
申请号：US17360204
申请日：2021-06-28
Applicant: Proton World International N.V.
Inventor： Jean-Louis Modave , Guillaume Docquier
IPC: G06F11/00 , G06F11/10 , G06F16/907 , G06F12/0802
CPC classification number: G06F11/1004 , G06F11/1048 , G06F12/0802 , G06F16/907
Abstract: A method of managing a non-volatile memory includes during a data writing process, selecting, by a program triggering the data writing process, an error detection and correction code from among two codes depending on a type of information being written. The information is written into the non-volatile memory, where the information is associated with the selected error detection and correction code.
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公开(公告)号：US10970384B2
公开(公告)日：2021-04-06
申请号：US16400495
申请日：2019-05-01
Applicant: Proton World International N.V.
Inventor： Jean-Louis Modave , Michael Peeters
Abstract: In authenticating a first circuit by a second circuit, the second circuit selects one of a set of public values and sends to the first circuit a request for a secret value corresponding to the selected one of the set of public values. The first circuit derives the secret value from the selected one of the set of public values using a seed from set of seeds that is stored in a destructive fashion such that each use of a seed destroys that seed. The set of seeds is smaller in number than the set of public values. The second circuit determines whether the secret value matches the selected one of the set of public values using a one-way function. A positive authentication is generated based upon the determination of a match.
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19.发明申请公开(公告)号：US20190108367A1
公开(公告)日：2019-04-11
申请号：US16200370
申请日：2018-11-26
Inventor： Jean-Louis Modave , Fabrice Marinet , Denis Farison
Abstract: A method of authenticating a slave device. The method includes initializing, by a host device, a charge retention circuit of the slave device, and receiving, by the host device, an indication of a discharge time of the charge retention circuit. The host device authenticates the slave device based on the received indication of the discharge time of the charge retention device.
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公开(公告)号：US20180150634A1
公开(公告)日：2018-05-31
申请号：US15659445
申请日：2017-07-25
Inventor： Jean-Louis Modave , Fabrice Marinet , Michael Peeters
CPC classification number: G06F21/556 , G06F21/72 , G06F21/75 , G06F21/755 , G06F21/76 , H04L9/002 , H04L2209/043 , H04L2209/08
Abstract: An integrated circuit includes functional circuitry such as a processing core, memory interfaces, cryptographic circuitry, etc. The integrated circuit also includes protection circuitry to protect the functional circuitry of the integrated circuit against attacks by hidden channels. The protection circuitry, for each of a series of successive periods of time, selects a configuration of the functional circuitry from a set of configurations of the functional circuitry, sets a duration of the period of time, and applies the selected configuration of the functional circuitry for the set duration of the period of time.
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