公开(公告)号：US12108073B2

公开(公告)日：2024-10-01

申请号：US18217840

申请日：2023-07-03

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jing Ya Li ,  Chong Soon Lim ,  Ru Ling Liao ,  Han Boon Teo ,  Hai Wei Sun ,  Che Wei Kuo ,  Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma

IPC: H04N19/00 ,  H04N19/139 ,  H04N19/159 ,  H04N19/176 ,  H04N19/513

CPC classification number: H04N19/513 ,  H04N19/139 ,  H04N19/159 ,  H04N19/176

Abstract: Provided is an encoder including circuitry and memory coupled to the circuitry. A prediction mode for a current block is an affine mode, and in operation, the circuitry: derives a base motion vector which is a motion vector to be used in a prediction process for the current block, and is a motion vector at an affine-mode control point in the current block; derives a first motion vector different from the base motion vector; derives a motion vector difference based on a difference between the base motion vector and the first motion vector; determines whether the motion vector difference is greater than a threshold; if so, modifies a second motion vector different from the base motion vector and the first motion vector, and if not, does not modify the second motion vector; and encodes the current block using the second motion vector modified or the second motion vector not modified.

公开(公告)号：US12101496B2

公开(公告)日：2024-09-24

申请号：US17517066

申请日：2021-11-02

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Virginie Drugeon ,  Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Yusuke Kato

IPC: H04N19/44 ,  H04N19/159 ,  H04N19/172 ,  H04N19/46

CPC classification number: H04N19/44 ,  H04N19/159 ,  H04N19/172 ,  H04N19/46

Abstract: Circuitry of a decoder is configured to decode an image according to a coding structure including an intra random access point (IRAP) picture, leading pictures to be output before the IRAP picture in output order, and trailing pictures to be output after the IRAP picture in the output order. When the image is decoded, the circuitry decodes, according to a flag in a bitstream, at most one trailing picture among the trailing pictures before decoding the leading pictures in decoding order, and decodes the trailing pictures other than the at most one trailing picture after decoding the leading pictures in the decoding order. The flag indicates whether a picture of each of access units in the bitstream is a field picture. The circuitry decodes the at most one trailing picture before decoding the leading pictures in the decoding order when the flag indicates that the picture is a field picture.

公开(公告)号：US12088849B2

公开(公告)日：2024-09-10

申请号：US17832973

申请日：2022-06-06

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Virginie Drugeon ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Yusuke Kato

IPC: H04N19/00 ,  H04N19/132 ,  H04N19/167 ,  H04N19/186 ,  H04N19/70

CPC classification number: H04N19/70 ,  H04N19/132 ,  H04N19/167 ,  H04N19/186

Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry determines whether or not a current video to be processed is a progressive video. When it is determined that the current video is a progressive video, the encoder encodes, into a bitstream, one syntax element indicating a chroma location type which is information indicating locations of chroma samples relative to luma samples for a frame included in the current video. When it is determined that the current video is not a progressive video, the encoder encodes two syntax elements into the bitstream, each of which indicates the chroma location type for a different one of fields of two types included in the current video.

公开(公告)号：US12088802B2

公开(公告)日：2024-09-10

申请号：US17876925

申请日：2022-07-29

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Ryuichi Kanoh ,  Tadamasa Toma ,  Kiyofumi Abe ,  Takahiro Nishi

IPC: H04N19/119 ,  H04N19/176

CPC classification number: H04N19/119 ,  H04N19/176

Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry in operation: determines whether the shape of a current chroma block to be split satisfies a first condition; generates one or more second candidates for a block partitioning method by eliminating one or more predetermined candidates from a plurality of first candidates for a block partitioning method when the current chroma block satisfies the first condition; selects a block partitioning method from among the one or more second candidates; and splits the current chroma block according to the block partitioning method selected.

公开(公告)号：US12081803B2

公开(公告)日：2024-09-03

申请号：US17873754

申请日：2022-07-26

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Masato Ohkawa ,  Hideo Saitou ,  Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma

IPC: H04N19/80 ,  H04N19/176 ,  H04N19/86

CPC classification number: H04N19/80 ,  H04N19/176 ,  H04N19/86

Abstract: For a location displaced by four samples in a vertical direction or a horizontal direction from a current location, the encoder performs a first determination of determining only whether the location displaced by four samples is a TU boundary, where the current location is a sample location of a current sub-block boundary on which the determination process is to be performed. In the first determination, when it is determined that the location displaced by four samples is a TU boundary, the encoder sets a maximum filter length to a first value, and in the case otherwise, the encoder performs a second determination of determining whether a location displaced by eight samples in the vertical direction or the horizontal direction from the current location is a TU boundary.

公开(公告)号：US12069266B2

公开(公告)日：2024-08-20

申请号：US17691623

申请日：2022-03-10

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Yusuke Kato ,  Kiyofumi Abe ,  Tadamasa Toma ,  Takahiro Nishi

IPC: H04N19/13 ,  H04N19/105 ,  H04N19/176 ,  H04N19/46 ,  H04N19/91

CPC classification number: H04N19/13 ,  H04N19/105 ,  H04N19/176 ,  H04N19/46 ,  H04N19/91

Abstract: An encoder includes circuitry and memory coupled to the circuitry. In residual coding of a current block to which an orthogonal transform is not applied, when coefficient information flags relating to a coefficient in the current block are encoded, the circuitry: performs a level mapping process to transform the coefficient to a second coefficient by using a predicted value, in which the predicted value is determined based on neighboring coefficients of the coefficient within the current block; encodes second coefficient information flags by Context-based Adaptive Binary Arithmetic Coding (CABAC), each of the second coefficient information flags relating to the second coefficient; and encodes a remainder value of the coefficient with Golomb-Rice code, and when the coefficient information flags are not encoded, in operation, the circuitry: skips the level mapping process; and encodes a value of the coefficient with the Golomb-Rice code.

公开(公告)号：US12034974B2

公开(公告)日：2024-07-09

申请号：US17885740

申请日：2022-08-11

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Hai Wei Sun ,  Chong Soon Lim ,  Han Boon Teo ,  Jing Ya Li ,  Che Wei Kuo ,  Chu Tong Wang ,  Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma

IPC: H04N19/70 ,  H04N19/124 ,  H04N19/132 ,  H04N19/186 ,  H04N19/80

CPC classification number: H04N19/70 ,  H04N19/124 ,  H04N19/132 ,  H04N19/186 ,  H04N19/80

Abstract: An encoder: includes circuitry, and memory coupled to the circuitry; stores a first parameter into a bitstream, the first parameter indicating whether a syntax element related to a chroma tool offset is present in the bitstream; when the first parameter indicates that the syntax element is present in the bitstream, (i) stores, in the bitstream, one or more second parameters that are used in deblocking filtering for a chroma sample of a current image, in addition to the syntax element, (ii) performs the deblocking filtering using the one or more second parameters, and (iii) encodes the current image; and when the first parameter indicates that the syntax element is not present in the bitstream, encodes the current image without storing the one or more second parameters into the bitstream.

公开(公告)号：US12034925B2

公开(公告)日：2024-07-09

申请号：US18071365

申请日：2022-11-29

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jing Ya Li ,  Chong Soon Lim ,  Hai Wei Sun ,  Han Boon Teo ,  Che Wei Kuo ,  Chu Tong Wang ,  Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Yusuke Kato

IPC: H04N19/82 ,  H04N19/105 ,  H04N19/117 ,  H04N19/119 ,  H04N19/124 ,  H04N19/13 ,  H04N19/18 ,  H04N19/186

CPC classification number: H04N19/117 ,  H04N19/105 ,  H04N19/119 ,  H04N19/124 ,  H04N19/13 ,  H04N19/18 ,  H04N19/186 ,  H04N19/82

Abstract: An encoder includes circuitry and memory. The circuitry, in operation, generates a first coefficient value by applying a CCALF (cross component adaptive loop filtering) process to a first reconstructed image sample of a luma component. The circuitry generates a second coefficient value by applying an ALF (adaptive loop filtering) process to a second reconstructed image sample of a chroma component. The circuitry generates a third coefficient value by adding the first coefficient value to the second coefficient value, and encodes a third reconstructed image sample of the chroma component using the third coefficient value. In the CCALF process, in response to a coordinate of the second reconstructed image sample being (x, y), coordinates of the first reconstructed image samples are (2x, 2y−1), (2x−1, 2y), (2x, 2y), (2x+1, 2y), (2x−1, 2y+1), (2x, 2y+1), (2x+1, 2y+1), and (2x, 2y+2).

公开(公告)号：US12022063B2

公开(公告)日：2024-06-25

申请号：US17332132

申请日：2021-05-27

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Ru Ling Liao ,  Chong Soon Lim ,  Jing Ya Li ,  Han Boon Teo ,  Hai Wei Sun ,  Che Wei Kuo ,  Yusuke Kato ,  Tadamasa Toma ,  Kiyofumi Abe ,  Takahiro Nishi

IPC: H04N19/107 ,  H04N19/176

CPC classification number: H04N19/107 ,  H04N19/176

Abstract: An image encoder includes: circuitry; and a memory coupled to the circuitry. The circuitry, in operation: calculates first values of a current block using intra prediction, the intra prediction being limited to planar mode, the planar mode using multiple reference pixels for each pixel location of the current block; calculates second values of the current block using inter prediction; calculates third values of the current block by weighting the first values and the second values; and encodes the current block using the third values, and in the calculating of the third values, a first weight is applied to the first values and a second weight is applied to the second values, the second weight being different from the first weight.

公开(公告)号：US12010347B2

公开(公告)日：2024-06-11

申请号：US17685226

申请日：2022-03-02

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Che-Wei Kuo ,  Chong Soon Lim ,  Jing Ya Li ,  Han Boon Teo ,  Hai Wei Sun ,  Chu Tong Wang ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Yusuke Kato

IPC: H04N19/82 ,  H04N19/117 ,  H04N19/119 ,  H04N19/124 ,  H04N19/13 ,  H04N19/176 ,  H04N19/18 ,  H04N19/186 ,  H04N19/593 ,  H04N19/61 ,  H04N19/96

CPC classification number: H04N19/82 ,  H04N19/117 ,  H04N19/119 ,  H04N19/124 ,  H04N19/13 ,  H04N19/176 ,  H04N19/18 ,  H04N19/186 ,  H04N19/593 ,  H04N19/61 ,  H04N19/96

Abstract: An encoder includes circuitry and memory. The circuitry, in operation, generates a first coefficient value by applying a CCALF (cross component adaptive loop filtering) process to a first reconstructed image sample of a luma component. The circuitry generates a second coefficient value by applying an ALF (adaptive loop filtering) process to a second reconstructed image sample of a chroma component. The circuitry generates a third coefficient value by adding the first coefficient value to the second coefficient value, and encodes a third reconstructed image sample of the chroma component using the third coefficient value. The circuitry determines a first parameter having the same value for Cb component and Cr component of the chroma component. The circuitry determines, using the first parameter, a model of entropy coding from a plurality of models. The circuitry performs, using the model, the entropy coding of a second parameter of the CCALF process.