公开(公告)号：US20230353790A1

公开(公告)日：2023-11-02

申请号：US18052108

申请日：2022-11-02

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Chu Tong WANG ,  Chong Soon LIM ,  Han Boon TEO ,  Hai Wei SUN ,  Jing Ya LI ,  Che-Wei KUO ,  Tadamasa TOMA ,  Takahiro NISHI ,  Kiyofumi ABE ,  Yusuke KATO

IPC: H04N19/17 ,  H04N19/186 ,  H04N19/82 ,  H04N19/117 ,  H04N19/132 ,  H04N19/167

CPC classification number: H04N19/82 ,  H04N19/117 ,  H04N19/132 ,  H04N19/167 ,  H04N19/17 ,  H04N19/186

Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry, in response to a first reconstructed image sample being located outside a virtual boundary, duplicates a reconstructed sample located inside and adjacent to the virtual boundary to generate the first reconstructed image sample. The circuitry generates a first coefficient value by applying a CCALF (cross component adaptive loop filtering) process to the first reconstructed image sample of a luma component. The circuitry generates a second coefficient value by applying an ALF (adaptive loop filtering) process to a second reconstructed image sample of a chroma component. The circuitry generates a third coefficient value by adding the first coefficient value to the second coefficient value, and encodes a third reconstructed image sample of the chroma component using the third coefficient value.

公开(公告)号：US20230096489A1

公开(公告)日：2023-03-30

申请号：US17944866

申请日：2022-09-14

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Ru Ling LIAO ,  Chong Soon LIM ,  Hai Wei SUN ,  Han Boon TEO ,  Jing Ya LI ,  Sughosh Pavan SHASHIDHAR ,  Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA

IPC: H04N19/105 ,  H04N19/159 ,  H04N19/176

Abstract: An encoder includes: circuitry; and memory coupled to the circuitry. The circuitry, in operation, stores a first parameter into a bitstream, the first parameter indicating, as a prediction mode, one of (i) a multiple prediction mode in which a prediction image is generated by overlapping an inter prediction image of a current block and an intra prediction image of the current block and (ii) one of a plurality of prediction modes including a non-rectangular mode in which a prediction image is generated for each non-rectangular partition in the current block, and encodes the current block according to the prediction mode.

公开(公告)号：US20230042791A1

公开(公告)日：2023-02-09

申请号：US17945629

申请日：2022-09-15

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Ru Ling LIAO ,  Chong Soon LIM ,  Hai Wei SUN ,  Han Boon TEO ,  Jing Ya LI ,  Sughosh Pavan SHASHIDHAR ,  Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA

IPC: H04N19/46 ,  H04N19/159 ,  H04N19/176

Abstract: An encoder includes: circuitry; and memory coupled to the circuitry. The circuitry, in operation, stores a first parameter into a bitstream, the first parameter indicating, as a prediction mode, one of (i) a multiple prediction mode in which a prediction image is generated by overlapping an inter prediction image of a current block and an intra prediction image of the current block and (ii) one of a plurality of prediction modes including a non-rectangular mode in which a prediction image is generated for each non-rectangular partition in the current block, and encodes the current block according to the prediction mode.

公开(公告)号：US20230007243A1

公开(公告)日：2023-01-05

申请号：US17943971

申请日：2022-09-13

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Ru Ling LIAO ,  Chong Soon LIM ,  Hai Wei SUN ,  Han Boon TEO ,  Jing Ya LI ,  Sughosh Pavan SHASHIDHAR ,  Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA

IPC: H04N19/105 ,  H04N19/176 ,  H04N19/159

Abstract: An encoder includes: circuitry; and memory coupled to the circuitry. The circuitry, in operation, stores a first parameter into a bitstream, the first parameter indicating, as a prediction mode, one of (i) a multiple prediction mode in which a prediction image is generated by overlapping an inter prediction image of a current block and an intra prediction image of the current block and (ii) one of a plurality of prediction modes including a non-rectangular mode in which a prediction image is generated for each non-rectangular partition in the current block, and encodes the current block according to the prediction mode.

公开(公告)号：US20220394303A1

公开(公告)日：2022-12-08

申请号：US17885740

申请日：2022-08-11

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Hai Wei SUN ,  Chong Soon LIM ,  Han Boon TEO ,  Jing Ya LI ,  Che Wei KUO ,  Chu Tong WANG ,  Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA

IPC: H04N19/70 ,  H04N19/186 ,  H04N19/80 ,  H04N19/132 ,  H04N19/124

Abstract: An encoder: includes circuitry, and memory coupled to the circuitry; stores a first parameter into a bitstream, the first parameter indicating whether a syntax element related to a chroma tool offset is present in the bitstream; when the first parameter indicates that the syntax element is present in the bitstream, (i) stores, in the bitstream, one or more second parameters that are used in deblocking filtering for a chroma sample of a current image, in addition to the syntax element, (ii) performs the deblocking filtering using the one or more second parameters, and (iii) encodes the current image; and when the first parameter indicates that the syntax element is not present in the bitstream, encodes the current image without storing the one or more second parameters into the bitstream.

公开(公告)号：US20220337876A1

公开(公告)日：2022-10-20

申请号：US17727299

申请日：2022-04-22

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jing Ya LI ,  Che Wei KUO ,  Chong Soon LIM ,  Chu Tong WANG ,  Han Boon TEO ,  Hai Wei SUN ,  Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA ,  Yusuke KATO

IPC: H04N19/66 ,  H04N19/122 ,  H04N19/176

Abstract: An encoder determines, based on a width and a height of a block, whether or not to disable a prediction mode in which the block is split along a partitioning line defined by a distance and an angle and then prediction is performed; and encodes the block with the prediction mode disabled or not disabled according to a result of the determination on whether or not to disable the prediction mode. Here, the distance is the shortest distance between the center of the block and the partitioning line, and the angle is an angle representing a direction from the center of the block toward the partitioning line in the shortest distance. The encoder determines to disable the prediction mode when (i) a width-to-height ratio is at least 8 or (ii) a height-to-width ratio is at least 8.

公开(公告)号：US20220295060A1

公开(公告)日：2022-09-15

申请号：US17726125

申请日：2022-04-21

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA ,  Ryuichi KANOH ,  Chong Soon LIM ,  Ru Ling LIAO ,  Hai Wei SUN ,  Sughosh Pavan SHASHIDHAR ,  Han Boon TEO ,  Jing Ya LI

IPC: H04N19/119 ,  H04N19/176

Abstract: Provided is an encoder which includes circuitry and memory. The circuitry encodes an image block using the memory. In encoding the image block, the circuitry: obtains one or more size parameters related to a size of the image block; determines whether the one or more size parameters and one or more thresholds satisfy a determined relationship; encodes a split parameter when the one or more size parameters and the one or more thresholds are determined to satisfy the determined relationship, the split parameter indicating whether the image block is to be split into a plurality of partitions including a non-rectangular partition; and encodes the image block after splitting the image block into the plurality of partitions when the split parameter indicates that the image block is to be split into the plurality of partitions.

公开(公告)号：US20220248033A1

公开(公告)日：2022-08-04

申请号：US17726840

申请日：2022-04-22

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jing Ya LI ,  Ru Ling LIAO ,  Chong Soon LIM ,  Han Boon TEO ,  Hai Wei SUN ,  Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA

IPC: H04N19/159 ,  H04N19/117 ,  H04N19/182

Abstract: An encoder includes circuitry and memory connected to the circuitry. The circuitry: derives an absolute value of a sum of gradient values in first and second ranges; derives, as a first parameter, a total sum of absolute values of sums of gradient values derived respectively for pairs of relative pixel positions; derives a pixel difference value between pixel values in the first and second ranges; inverts or maintains a plus or minus sign of the pixel difference value, according to a plus or minus sign of the sum of the gradient values indicating the sum of the gradient values in the first and second ranges; derives, as a second parameter, a total sum of pixel difference values each having the plus or minus sign inverted or maintained, the pixel difference values derived respectively for the relative pixel positions; and generates a prediction image using the first and second parameters.

公开(公告)号：US20220248015A1

公开(公告)日：2022-08-04

申请号：US17727201

申请日：2022-04-22

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA ,  Ryuichi KANOH ,  Chong Soon LIM ,  Ru Ling LIAO ,  Hai Wei SUN ,  Sughosh Pavan SHASHIDHAR ,  Han Boon TEO ,  Jing Ya LI

IPC: H04N19/119 ,  H04N19/176

Abstract: Provided is an encoder which includes circuitry and memory. The circuitry encodes an image block using the memory. In encoding the image block, the circuitry: obtains one or more size parameters related to a size of the image block; determines whether the one or more size parameters and one or more thresholds satisfy a determined relationship; encodes a split parameter when the one or more size parameters and the one or more thresholds are determined to satisfy the determined relationship, the split parameter indicating whether the image block is to be split into a plurality of partitions including a non-rectangular partition; and encodes the image block after splitting the image block into the plurality of partitions when the split parameter indicates that the image block is to be split into the plurality of partitions.

公开(公告)号：US20220191487A1

公开(公告)日：2022-06-16

申请号：US17685226

申请日：2022-03-02

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Che-Wei KUO ,  Chong Soon LIM ,  Jing Ya LI ,  Han Boon TEO ,  Hai Wei SUN ,  Chu Tong WANG ,  Tadamasa TOMA ,  Takahiro NISHI ,  Kiyofumi ABE ,  Yusuke KATO

IPC: H04N19/117 ,  H04N19/82 ,  H04N19/186 ,  H04N19/13 ,  H04N19/119 ,  H04N19/176 ,  H04N19/593 ,  H04N19/18 ,  H04N19/124 ,  H04N19/96 ,  H04N19/61

Abstract: An encoder includes circuitry and memory. The circuitry, in operation, generates a first coefficient value by applying a CCALF (cross component adaptive loop filtering) process to a first reconstructed image sample of a luma component. The circuitry generates a second coefficient value by applying an ALF (adaptive loop filtering) process to a second reconstructed image sample of a chroma component. The circuitry generates a third coefficient value by adding the first coefficient value to the second coefficient value, and encodes a third reconstructed image sample of the chroma component using the third coefficient value. The circuitry determines a first parameter having the same value for Cb component and Cr component of the chroma component. The circuitry determines, using the first parameter, a model of entropy coding from a plurality of models. The circuitry performs, using the model, the entropy coding of a second parameter of the CCALF process.