公开(公告)号：US20170263501A1

公开(公告)日：2017-09-14

申请号：US15427380

申请日：2017-02-08

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： BUNZI MIZUNO ,  SHOGO OKITA ,  NORIYUKI MATSUBARA ,  ATSUSHI HARIKAI ,  MITSURU HIROSHIMA

IPC: H01L21/78 ,  H01L29/30 ,  H01L23/31 ,  H01L21/56 ,  H01L21/311

CPC classification number: H01L21/78 ,  H01L21/311 ,  H01L21/56 ,  H01L21/561 ,  H01L23/3171 ,  H01L23/3185 ,  H01L29/30

Abstract: A method for manufacturing an element chip includes a laser dicing step of dividing the substrate to a plurality of element chips including the element region by irradiating the dividing region of the substrate with laser light, in a state of supported by a supporting member and forming a damaged region on an end surface of the element chip. Furthermore, the method for manufacturing an element chip includes a protection film stacking step of stacking a protection film on the first main surface and the end surface of the element chip, after the laser dicing step and a protection film etching step of removing the protection film stacked on the first main surface through etching the protection film anisotropically by exposing the element chip to plasma, after the protection film stacking, step and remaining the protection film for covering the damaged region.

公开(公告)号：US20170229366A1

公开(公告)日：2017-08-10

申请号：US15408718

申请日：2017-01-18

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： ATSUSHI HARIKAI ,  SHOGO OKITA ,  NORIYUKI MATSUBARA ,  MITSURU HIROSHIMA ,  MITSUHIRO OKUNE

IPC: H01L23/31 ,  H01L23/29 ,  H01L21/3065 ,  H01L21/02 ,  H01L21/78 ,  H01L23/544

CPC classification number: H01L23/3178 ,  H01L21/0212 ,  H01L21/02274 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/31138 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/293 ,  H01L23/3185 ,  H01L23/544 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2223/5446

Abstract: In a plasma processing step that is used in the method of manufacturing the element chip for manufacturing a plurality of element chips by dividing a substrate having a plurality of element regions, the substrate is divided into the element chips by exposing the substrate to first plasma. Therefore, the element chips having a first surface, a second surface, and a side surface on which a plurality of convex portions are formed are held spaced from each other on a carrier. A protection film is formed on the side surface of the element chip by exposing the element chip to second plasma, at least convex portions formed on the side surface are covered by the protection film in the protection film formation, and creep-up of a conductive material to the side surface is suppressed in the mounting step.