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11.发明申请公开(公告)号：US20230074357A1
公开(公告)日：2023-03-09
申请号：US17984879
申请日：2022-11-10
申请人： Qorvo US, Inc.
发明人： Yazid Yusuf , Mohammad J. Modarres-Zadeh , Andreas Tag , Paul Stokes , Robert Aigner , Gernot Fattinger
摘要： Disclosed is a Bulk Acoustic Wave (BAW) filter structure with a conductive bridge forming an electrical loop with an electrode for reduced electrical losses. In exemplary aspects disclosed herein, the BAW filter structure includes a transducer with electrodes, a piezoelectric layer between the electrodes, and at least one conductive bridge offset from at least a portion of one of the electrodes by an insulating volume. The conductive bridge forms a first electrical loop between a medial end and a distal end of the electrode. Such a configuration reduces electrical resistance, heat resistance, and/or ohmic losses for improved electrical loss of the BAW filter structure.
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公开(公告)号：US20220352862A1
公开(公告)日：2022-11-03
申请号：US17857715
申请日：2022-07-05
申请人： Qorvo US, Inc.
发明人： Shogo Inoue , Marc Solal , Robert Aigner
摘要： A method of fabricating a bonded wafer with low carrier lifetime in silicon comprises providing a silicon substrate having opposing top and bottom surfaces, modifying a top portion of the silicon substrate to reduce carrier lifetime in the top portion relative to the carrier lifetime in portions of the silicon substrate other than the top portion, bonding a piezoelectric layer having opposing top and bottom surfaces separated by a distance T over the top surface of the silicon substrate, and providing a pair of electrodes having fingers that are inter-digitally dispersed on a top surface of the piezoelectric layer, the electrodes comprising a portion of a Surface Acoustic Wave (SAW) device. The modifying and bonding steps may be performed in any order. The modified top portion of the silicon substrate prevents the creation of a parasitic conductance within that portion during operation of the SAW device.
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公开(公告)号：US20200317507A1
公开(公告)日：2020-10-08
申请号：US16720919
申请日：2019-12-19
申请人： Qorvo US, Inc.
发明人： Nadim Khlat , Robert Aigner
摘要： A wire-based microelectromechanical systems (MEMS) apparatus is provided. In examples discussed herein, the wire-based MEMS apparatus includes a MEMS control bus and at least one passive MEMS switch circuit. The passive MEMS switch circuit is configured to close a MEMS switch(es) by generating a constant voltage(s) that exceeds a defined threshold voltage (e.g., 30-50 V). In a non-limiting example, the passive MEMS switch circuit can generate the constant voltage(s) based on a radio frequency (RF) voltage(s), which may be harvested from an RF signal(s) received via the MEMS control bus. In this regard, it may be possible to eliminate active components and/or circuits from the passive MEMS switch circuit, thus helping to reduce leakage and power consumption. As a result, it may be possible to provide the passive MEMS switch circuit in a low power apparatus for supporting such applications as the Internet-of-Things (IoT).
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公开(公告)号：US10790216B2
公开(公告)日：2020-09-29
申请号：US16038879
申请日：2018-07-18
申请人： Qorvo US, Inc.
发明人： Julio C. Costa , Robert Aigner
IPC分类号： H01L23/552 , H01L23/42 , H01L23/373 , H01L21/56 , H01L23/31 , H01L23/367
摘要： The present disclosure relates to a thermally enhanced semiconductor package, which includes a module substrate, a thinned flip chip die over the module substrate, a mold compound component, a thermally conductive film, and a thermally enhanced mold compound component. The mold compound component resides over the module substrate, surrounds the thinned flip chip die, and extends above an upper surface of the thinned flip chip die to form a cavity over the upper surface of the thinned flip chip die. The thermally conductive film resides over at least the upper surface of the thinned flip chip at the bottom of the cavity. The thermally enhanced mold compound component resides over at least a portion of the thermally conductive film to fill the cavity.
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公开(公告)号：US10615147B2
公开(公告)日：2020-04-07
申请号：US16004961
申请日：2018-06-11
申请人： Qorvo US, Inc.
发明人： Julio C. Costa , Robert Aigner , Gernot Fattinger , Dirk Robert Walter Leipold , George Maxim , Baker Scott , Merrill Albert Hatcher, Jr. , Jon Chadwick
IPC分类号： H01L23/522 , H01L25/065 , H01L23/31 , H01L21/768 , H01L21/306 , H01L23/00 , H01L25/00 , H01L21/56
摘要： The present disclosure relates to a microelectronics package with vertically stacked flip-chip dies, and a process for making the same. The disclosed microelectronics package includes a module board, a first thinned flip-chip die with a through-die via, a second flip-chip die with a package contact at the bottom, and a mold compound. Herein, a top portion of the through-die via is exposed at top of the first thinned flip-chip die. The first thinned flip-chip die and the mold compound reside over the module substrate. The mold compound surrounds the first thinned flip-chip die and extends above the first thinned flip-chip die to define an opening. The second flip-chip die, which has a smaller plane size than the first thinned flip-chip die, resides within the opening and is stacked with the first thinned flip-chip die by coupling the package contact to the exposed top portion of the through-die via.
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公开(公告)号：US10574203B2
公开(公告)日：2020-02-25
申请号：US15087225
申请日：2016-03-31
申请人： QORVO US, INC.
发明人： Shogo Inoue , Marc Solal , Robert Aigner
摘要： A bonded wafer with low carrier lifetime in silicon comprises a silicon substrate having opposing top and bottom surfaces; a piezoelectric layer bonded over the top surface of the silicon substrate and having opposing top and bottom surfaces separated by a distance T; and a pair of electrodes having fingers that are inter-digitally dispersed on the top surface of the piezoelectric layer in a pattern having a center-to-center distance D between adjacent fingers of the same electrode, the electrodes comprising a portion of a Surface Acoustic Wave (SAW) device. A structure of the silicon in a top portion of the silicon substrate has been modified to reduce carrier lifetime and prevent the creation of a parasitic conductance within the top portion of the silicon substrate during operation of the SAW device.
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公开(公告)号：US10553521B2
公开(公告)日：2020-02-04
申请号：US16038879
申请日：2018-07-18
申请人： Qorvo US, Inc.
发明人： Julio C. Costa , Robert Aigner
IPC分类号： H01L23/552 , H01L23/42 , H01L23/373 , H01L21/56 , H01L23/31 , H01L23/367
摘要： The present disclosure relates to a thermally enhanced semiconductor package, which includes a module substrate, a thinned flip chip die over the module substrate, a mold compound component, a thermally conductive film, and a thermally enhanced mold compound component. The mold compound component resides over the module substrate, surrounds the thinned flip chip die, and extends above an upper surface of the thinned flip chip die to form a cavity over the upper surface of the thinned flip chip die. The thermally conductive film resides over at least the upper surface of the thinned flip chip at the bottom of the cavity. The thermally enhanced mold compound component resides over at least a portion of the thermally conductive film to fill the cavity.
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公开(公告)号：US10256790B2
公开(公告)日：2019-04-09
申请号：US14757651
申请日：2015-12-23
申请人： Qorvo US, Inc.
摘要： RF circuitry, which includes a first acoustic RF resonator (ARFR) and a first compensating ARFR, is disclosed. A first inductive element is coupled between the first compensating ARFR and a first end of the first ARFR. A second inductive element is coupled between the first compensating ARFR and a second end of the first ARFR. The first compensating ARFR, the first inductive element, and the second inductive element at least partially compensate for a parallel capacitance of the first ARFR.
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公开(公告)号：US20180358947A1
公开(公告)日：2018-12-13
申请号：US16003417
申请日：2018-06-08
申请人： Qorvo US, Inc.
摘要： Filter circuits having acoustic wave resonators in a transversal configuration are disclosed. In the transversal configuration, the acoustic wave resonators are arranged transverse to an input and output port of the filter circuit. As such, all the acoustic wave resonators of the filter circuit are connected to the input port and connected to the output port. In the transversal configuration, the filter circuit can be designed for any transfer function without being restricted to a coupling coefficient of a piezoelectric material used in the acoustic wave resonators. In this regard, the filter circuit can achieve very wideband filter responses, multiband responses, and/or responses with arbitrary position of transmission zeros. The filter circuit having the transversal configuration can also be designed for complex transmission zeros for phase equalization.
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公开(公告)号：US10141644B2
公开(公告)日：2018-11-27
申请号：US15490381
申请日：2017-04-18
申请人： Qorvo US, Inc.
发明人： Nadim Khlat , Robert Aigner
IPC分类号： H03H9/74 , H01Q5/335 , H03H9/64 , H03H9/60 , H04B1/525 , H04B1/00 , H04B11/00 , H03H9/54 , H03H9/70 , H03H9/72 , H01Q1/24 , H03H7/09
摘要： Filter circuitry is used in communication systems that employ multiple antennas. In general, a communication system may have a transmit path and a receive path. The transmit path extends to a first antenna port and is configured to present signals for transmission in a first communication band and a second communication band to the first antenna port for transmission via a first antenna that is coupled to the first antenna port. The receive path extends to a second antenna port and comprises a first multiple passband/multiple stopband filter that provides a plurality of passbands and a plurality of stopbands interleaved with one another, wherein a first stopband and a second stopband of the plurality of stopbands correspond respectively to the first communication band and the second communication band and are separated by a first passband of the plurality of passbands.
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