公开(公告)号：US20190213150A1

公开(公告)日：2019-07-11

申请号：US16243698

申请日：2019-01-09

Applicant: QUALCOMM Incorporated

Inventor： Tomer Rafael BEN-CHEN ,  Sharon GRAIF ,  Shaul Yohai YIFRACH

IPC: G06F13/20

CPC classification number: G06F13/20

Abstract: The disclosure includes systems and methods for bus control. A method comprises receiving a data exchange request, wherein the data exchange request includes a data exchange tag that identifies a data exchange, splitting the data exchange into a plurality of fractional data transactions, providing one or more bus commands to a system bus, receiving, at the bus controller, one or more acceptance notifications indicating that the one or more of the plurality have been accepted by the system bus, assigning transaction identifiers (TIDs) corresponding to the one or more of the plurality of fractional data transactions, receiving one or more completion notifications indicating that the one or more of the plurality have been completed, determining that each of the plurality of fractional data transactions associated with the data exchange tag have been completed, and notifying the processor that the requested data exchange has been completed.

公开(公告)号：US20180357121A1

公开(公告)日：2018-12-13

申请号：US15992701

申请日：2018-05-30

Applicant: QUALCOMM Incorporated

Inventor： Sharon GRAIF ,  Tomer Rafael BEN-CHEN ,  Samer TOBIA

IPC: G06F11/07 ,  G06F13/42 ,  G06F11/10

CPC classification number: G06F11/0793 ,  G06F11/0745 ,  G06F11/1004 ,  G06F13/4282

Abstract: Systems, methods, and apparatus are described that enable communication of signals over a serial data bus. A method performed at a transmitter/sender device coupled to the serial data bus includes determining at a transmitter on the serial data bus a condition whereby a receiver in communication with the transmitter on the serial data bus is initiating a termination of data transfer between the transmitter and the receiver. The method further includes calculating an error check word in the transmitter simultaneous with data transfer from the transmitter to the receiver, and temporarily taking control of the serial bus with the transmitter after initiation of the termination of data transfer and transmitting the calculated error check word to the receiver.

公开(公告)号：US20210050868A1

公开(公告)日：2021-02-18

申请号：US16947685

申请日：2020-08-12

Applicant: QUALCOMM Incorporated

Inventor： Haim Mendel WEISSMAN ,  Gideon Shlomo KUTZ ,  Alexander Vladimir SVERDLOV ,  Michael LEVITSKY ,  Balasubramanian RAMACHANDRAN ,  Sharon GRAIF

IPC: H04B1/00 ,  H04B1/16 ,  H04W88/06

Abstract: Various aspects of the present disclosure generally relate to wireless communications. In some aspects, a user equipment (UE) may receive a first signal associated with a first radio access technology (RAT) and receive a second signal associated with a second RAT. In some aspects, the UE may include one or more receiver chains associated with the first RAT and at least one receiver chain associated with the second RAT. The UE may couple, via one or more switches and based at least in part on respective energy levels associated with the first signal and the second signal satisfying one or more conditions, an output from a front end of the at least one receiver chain associated with the second RAT to the one or more receiver chains associated with the first RAT. Numerous other aspects are provided.

公开(公告)号：US20210026796A1

公开(公告)日：2021-01-28

申请号：US16519531

申请日：2019-07-23

Applicant: QUALCOMM Incorporated

Inventor： Sharon GRAIF ,  Meital ZANGVIL ,  Lior AMARILIO

IPC: G06F13/42 ,  G06F13/24

Abstract: Systems, methods, and apparatus are described. A method for data communication performed at a master device includes configuring a serial interface for a point-to-point mode of operation, transmitting a first two-bit command through the serial interface, the two-bit command including a one-bit address and a read/write bit, and initiating a transaction through the serial interface. The transaction may be identified by the two-bit command and is conducted in accordance with an I3C protocol. The transaction may include the transfer of one or more data frames formatted in accordance with the I3C protocol. The method may include receiving an acknowledgement from a slave device in response to the first two-bit command.

公开(公告)号：US20190354505A1

公开(公告)日：2019-11-21

申请号：US16381189

申请日：2019-04-11

Applicant: QUALCOMM Incorporated

Inventor： Radu PITIGOI-ARON ,  Sharon GRAIF ,  Richard Dominic WIETFELDT

IPC: G06F13/42

Abstract: Systems, methods, and apparatus are described that enable a serial bus to be operated in one or more modes that employ additional wires for communicating data. A method includes providing a data payload for a first data frame to be transmitted over a plurality of data lanes of a multilane serial bus operated in accordance with an I3C protocol, providing one or more indicators of validity of one or more bytes included in the data payload, and transmitting the first data frame over the multilane serial bus in accordance with a clock signal transmitted on a clock lane of the multilane serial bus.

公开(公告)号：US20190108149A1

公开(公告)日：2019-04-11

申请号：US15729247

申请日：2017-10-10

Applicant: QUALCOMM Incorporated

Inventor： Sharon GRAIF ,  Lior AMARILIO ,  Oren NISHRY

IPC: G06F13/24 ,  G06F13/364 ,  G06F13/42 ,  G06F13/40 ,  G06F9/44

Abstract: Systems, methods, and apparatus for communication over a serial bus in accordance with an I3C protocol are described. A master device coupled to the serial bus may detect signaling on the serial bus corresponding to an in-band interrupt asserted by a slave device that is addressable by a first device identifier, receive a second device identifier transmitted by the slave device in relation to the in-band interrupt, use the second device identifier to select an execution environment, and interrupt the execution environment responsive to the in-band interrupt. The slave device may use the first device identifier in transactions conducted over the serial bus. After detecting an event generated by an event source, the slave device may initiate an in-band interrupt on the serial bus, and may transmit the second device identifier to indicate the event source during an in-band interrupt handling procedure.

公开(公告)号：US20190095273A1

公开(公告)日：2019-03-28

申请号：US16123737

申请日：2018-09-06

Applicant: QUALCOMM Incorporated

Inventor： Sharon GRAIF ,  Amit GIL ,  David TEB ,  Radu PITIGOI-ARON

IPC: G06F11/10 ,  G06F1/04 ,  G06F11/07 ,  G06F13/42

Abstract: Systems, methods, and apparatus are described that enable a serial bus to be operated in one or more modes that employ additional wires for communicating data. An apparatus has a bus including a first lane and a second lane, a plurality of devices coupled to the bus and, in a first mode of operation, the plurality of devices is configured to exchange data in a signal transmitted on the first lane in accordance with timing provided by a clock signal transmitted on the second lane. The apparatus may include one or more additional lanes connecting two or more devices in the plurality of devices, the two or more devices being configured to use the first lane and at least one of the additional lanes for data transmissions in a second mode of operation.