CONTROLLER HARDWARE AUTOMATION FOR HOST-AWARE PERFORMANCE BOOSTER

    公开(公告)号:US20190121540A1

    公开(公告)日:2019-04-25

    申请号:US15789903

    申请日:2017-10-20

    Abstract: In a conventional system with a UFS device connected to a UFS host implementing HPB features, a UFS driver software generates commands, e.g., read and write commands, for the UFS device to perform. The commands include both physical and logical addresses of the UFS device. Typically, the UFS driver software is software based. Therefore, there is much overhead associated with implementing the HPB. To address this issue, it is proposed to enable a hardware based host controller to perform operations related to the HPB. In this way, the performance of a system may be improved.

    PARITY BITS LOCATION ON I3C MULTILANE BUS
    3.
    发明申请

    公开(公告)号:US20190095273A1

    公开(公告)日:2019-03-28

    申请号:US16123737

    申请日:2018-09-06

    Abstract: Systems, methods, and apparatus are described that enable a serial bus to be operated in one or more modes that employ additional wires for communicating data. An apparatus has a bus including a first lane and a second lane, a plurality of devices coupled to the bus and, in a first mode of operation, the plurality of devices is configured to exchange data in a signal transmitted on the first lane in accordance with timing provided by a clock signal transmitted on the second lane. The apparatus may include one or more additional lanes connecting two or more devices in the plurality of devices, the two or more devices being configured to use the first lane and at least one of the additional lanes for data transmissions in a second mode of operation.

    UNIVERSAL FLASH STORAGE (UFS) HOST DESIGN FOR SUPPORTING EMBEDDED UFS AND UFS CARD

    公开(公告)号:US20180107384A1

    公开(公告)日:2018-04-19

    申请号:US15292675

    申请日:2016-10-13

    Abstract: Systems and method are directed to a Universal Flash Storage (UFS) host capable of interfacing one or more UFS devices. The UFS host includes a plurality of mobile-physical-layers (M-PHYs) for supporting one or more lanes of traffic between the UFS host and the one or more UFS devices. A Reference M-PHY MODULE Interface (RMMI) router is coupled between a Unified Protocol link layer (Unipro) and the plurality of M-PHYs. The RMMI router is configurable in a transparent mode to pass traffic, without routing, between the UFS host and a 2-lane embedded UFS device through the two M-PHYs. The RMMI router is configurable in a routing mode, to route traffic to a first M-PHY interfacing a 1-lane embedded UFS device or to a second M-PHY interfacing a 1-lane removable UFS card. The RMMI router is configurable based on metal strap or read only memory (ROM) setting.

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