公开(公告)号：US20180247952A1

公开(公告)日：2018-08-30

申请号：US15961334

申请日：2018-04-24

Applicant: Renesas Electronics Corporation

Inventor： Shibun TSUDA

IPC: H01L27/11568 ,  H01L29/792 ,  H01L29/423 ,  H01L29/78 ,  H01L27/11573 ,  H01L27/088

CPC classification number: H01L27/11568 ,  H01L21/28282 ,  H01L21/762 ,  H01L21/823431 ,  H01L27/0886 ,  H01L27/1157 ,  H01L27/11573 ,  H01L29/42344 ,  H01L29/42348 ,  H01L29/66833 ,  H01L29/7851 ,  H01L29/7856 ,  H01L29/792

Abstract: A semiconductor device includes a semiconductor substrate including a main surface, a plurality of first projecting portions which include portions of the semiconductor substrate provided in a first region of the semiconductor substrate to extend in a first direction along the main surface of the semiconductor substrate and to be spaced apart from each other in a second direction, orthogonal to the first direction, along the main surface of the semiconductor substrate, a first isolation region provided between the first projecting portions adjacent to each other, and first and second transistors provided in and over an upper part of each of the first projecting portions which is exposed from an upper surface of the first isolation region to be adjacent to each other in the first direction.

公开(公告)号：US20170345842A1

公开(公告)日：2017-11-30

申请号：US15682492

申请日：2017-08-21

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Yosuke TAKEUCHI ,  Eiji TSUKUDA ,  Kenichiro SONODA ,  Shibun TSUDA

IPC: H01L27/11573 ,  H01L27/11565 ,  H01L29/423 ,  H01L29/78

CPC classification number: H01L27/11573 ,  H01L27/11565 ,  H01L29/42344 ,  H01L29/7851 ,  H01L29/792 ,  H01L2029/7857

Abstract: A semiconductor device includes a semiconductor substrate, an element isolation film, and a fin having side surfaces facing each other in a first direction of an upper surface and a main surface connecting the facing side surfaces and extending in a second direction orthogonal to the first direction. The device further includes a control gate electrode arranged over the side surface via a gate insulation film and extending in the first direction, and a memory gate electrode arranged over the side surface via another gate insulation film having a charge accumulation layer and extending in the first direction. Furthermore, an overlap length by which the memory gate electrode overlaps with the side surface is smaller than an overlap length by which the control gate electrode overlaps with the side surface in the direction orthogonal to the upper surface.

公开(公告)号：US20170084625A1

公开(公告)日：2017-03-23

申请号：US15265473

申请日：2016-09-14

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Yosuke TAKEUCHI ,  Eiji TSUKUDA ,  Kenichiro SONODA ,  Shibun TSUDA

IPC: H01L27/115 ,  H01L29/78

CPC classification number: H01L27/11573 ,  H01L27/11565 ,  H01L29/42344 ,  H01L29/7851 ,  H01L29/792 ,  H01L2029/7857

Abstract: A semiconductor device includes a semiconductor substrate, an element isolation film, and a fin having side surfaces facing each other in a first direction of an upper surface and a main surface connecting the facing side surfaces and extending in a second direction orthogonal to the first direction. The device further includes a control gate electrode arranged over the side surface via a gate insulation film and extending in the first direction, and a memory gate electrode arranged over the side surface via another gate insulation film having a charge accumulation layer and extending in the first direction. Furthermore, an overlap length by which the memory gate electrode overlaps with the side surface is smaller than an overlap length by which the control gate electrode overlaps with the side surface in the direction orthogonal to the upper surface.