公开(公告)号：US20220336588A1

公开(公告)日：2022-10-20

申请号：US17718101

申请日：2022-04-11

Applicant: Richtek Technology Corporation

Inventor： Chih-Wen Hsiung ,  Chun-Lung Chang ,  Kun-Huang Yu ,  Kuo-Chin Chiu ,  Wu-Te Weng

IPC: H01L29/10 ,  H01L29/06 ,  H01L29/78 ,  H01L21/74 ,  H01L29/66

Abstract: A high voltage device includes: a semiconductor layer, a well, a body region, a body contact, a gate, a source, and a drain. The body cofntact is configured as an electrical contact of the body region. The body contact and the source overlap with each other to define an overlap region. The body contact has a depth from an upper surface of the semiconductor layer, wherein the depth is deeper than a depth of the source, whereby a part of the body contact is located vertically below the overlap region. A length of the overlap region in a channel direction is not shorter than a predetermined length, so as to suppress a parasitic bipolar junction transistor from being turning on when the high voltage device operates, wherein the parasitic bipolar junction transistor is formed by a part of the well, a part of the body region and a part of the source.

公开(公告)号：US20220157982A1

公开(公告)日：2022-05-19

申请号：US17506422

申请日：2021-10-20

Applicant: RICHTEK TECHNOLOGY CORPORATION

Inventor： Kuo-Chin Chiu ,  Ta-Yung Yang ,  Chien-Wei Chiu ,  Wu-Te Weng ,  Chien-Yu Chen ,  Chih-Wen Hsiung ,  Chun-Lung Chang ,  Kun-Huang Yu ,  Ting-Wei Liao

IPC: H01L29/78 ,  H01L29/872 ,  H01L29/66

Abstract: A high voltage device for use as an up-side switch of a power stage circuit includes: at least one lateral diffused metal oxide semiconductor (LDMOS) device, a second conductivity type isolation region and at least one Schottky barrier diode (SBD). The LDMOS device includes: a well formed in a semiconductor layer, a body region, a gate, a source and a drain. The second conductivity type isolation region is formed in the semiconductor layer and is electrically connected to the body region. The SBD includes: a Schottky metal layer formed on the semiconductor layer and a Schottky semiconductor layer formed in the semiconductor layer. The Schottky semiconductor layer and the Schottky metal layer form a Schottky contact. In the semiconductor layer, the Schottky semiconductor layer is adjacent to and in contact with the second conductivity type isolation region.