Motor drive with independent physical backplane communication

    公开(公告)号:US11139768B2

    公开(公告)日:2021-10-05

    申请号:US15692969

    申请日:2017-08-31

    Abstract: Control circuitry of a motor drive provides commands for operation of power circuitry based at least in part on signals exchanged with functional circuits, such as for system data and control data, such as feedback of motor or system parameters. The functional circuits may operate at different data rates, with different interrupt intervals, depending upon their capabilities. The control circuitry accommodates all of these flexibly. A physical backplane printed circuit board comprising independent data lines for each functional circuit allows for independent configuration of the data rates, interrupt intervals and communications between the control circuitry and the functional circuits.

    MOTOR DRIVE WITH DYNAMIC INTERVAL COMMUNICATION

    公开(公告)号:US20180175771A1

    公开(公告)日:2018-06-21

    申请号:US15693056

    申请日:2017-08-31

    Abstract: Control circuitry of a motor drive provides commands for operation of power circuitry in cooperation with peripheral circuits and devices, such as converters, inverters, feedback precharge circuits, feedback devices, interfaces, and so forth. The communications with the devices is handled by fiber optic communications circuitry that implements a flexible scheme of dynamic interval communication depending upon the capabilities and design of the peripheral circuit or device. The communication may be in accordance with a plurality of predetermined schemes, each having different data transfer rates, data allocations, and so forth. The schemes may each set communications protocols (e.g., timing) over a high speed interface between the fiber optic communications circuitry on one side and over fiber optic cables to the peripherals on another side.

    POWER LAYER GENERATION OF INVERTER GATE DRIVE SIGNALS
    14.
    发明申请
    POWER LAYER GENERATION OF INVERTER GATE DRIVE SIGNALS 有权
    逆变器门驱动信号的功率层生成

    公开(公告)号:US20130155746A1

    公开(公告)日:2013-06-20

    申请号:US13767732

    申请日:2013-02-14

    CPC classification number: H02M7/537 H03K5/135

    Abstract: Techniques include systems and methods of synchronizing multiple parallel inverters in a power converter system. In one embodiment, control circuitry is connected to a power layer interface circuitry at each of the parallel inverters, via an optical fiber interface. The system is synchronized by transmitting a synchronizing pulse to each of the inverters. Depending on the operational mode of the system, different data exchanges may occur in response to the pulse. In an off mode, power up and power down data may be exchanged between the control circuitry and the inverters. In an initiating mode, identification data may be transmitted from the inverters to the control circuitry. In an active mode, control data may be sent from the control circuitry to the inverters. In some embodiments, the inverters also transmit feedback data and/or acknowledgement signals to the control circuitry. Power layer circuitry of the inverter adjusts a local clock based upon sampled data from the control circuitry to maintain synchronicity of the inverters between synchronization pulses.

    Abstract translation: 技术包括在功率转换器系统中同步多个并联逆变器的系统和方法。 在一个实施例中,控制电路经由光纤接口连接到每个并联逆变器处的功率层接口电路。 通过向每个逆变器发送同步脉冲来同步该系统。 根据系统的工作模式,响应脉冲可能会发生不同的数据交换。 在关闭模式下,可以在控制电路和逆变器之间交换上电和断电数据。 在启动模式中,识别数据可以从逆变器发送到控制电路。 在主动模式中,控制数据可以从控制电路发送到逆变器。 在一些实施例中,逆变器还将反馈数据和/或确认信号发送到控制电路。 逆变器的功率层电路基于来自控制电路的采样数据调整本地时钟,以保持同步脉冲之间的逆变器的同步性。

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