摘要:
An apparatus and method for protecting semiconductor switching devices from damage due to electrostatic discharge is provided. The apparatus detects the occurrence of an ESD event, and turns the switching circuit to an operating state in which electrostatic charge is dissipated through the switching circuit. In embodiments of the invention, the switching circuit is a CMOS inverter circuit and the apparatus includes a PMOS transistor that upon occurrence of an ESD event couples an output of the inverter circuit to ground to discharge the electrostatic charge.
摘要:
An exhaust assembly for use with a gas-fired water heater that includes a hood for receiving exhaust gas from the gas-fired water heater, a housing, and a fan positioned in the housing to move exhaust gas from the hood out of the exhaust outlet. The hood includes a first hood mounting location and a second hood mounting location. The housing includes an exhaust outlet and a housing mounting location. In a first configuration, the exhaust outlet faces a first direction and the housing mounting location is aligned with and secured at the first hood mounting location. In a second configuration, the exhaust outlet faces a second direction different than the first direction and the housing mounting location is aligned with and secured at the second hood mounting location.
摘要:
The present invention provides for a hose reel assembly structured for ease of use and maintenance. The hose reel assembly includes a folding crank handle, having an easily accessible and identifiable release, an easily released water system, and an autotrack device that is easily engaged/disengaged. By improving the ease of use of such components, the amount of wear and tear on the hose reel is reduced and the life of the hose reel is extended.
摘要:
A cover assembly is provided for preventing water infiltration into an in-floor receptacle fitting, such as a poke-thru fitting. The cover assembly includes a trim flange which overlies the fitting and is adapted to support at least one receptacle within the fitting. A cover plate is mounted on the trim flange includes access doors for selectively covering and exposing the receptacles. A first seal member is interposed between the cover plate and the trim flange for sealing against water infiltration therebetween. The first seal may be in the form of a planar gasket or O-ring. A second seal, in the form of at least one compressible gasket, extends around the perimeter of the floor opening and is adapted to be compressed between the trim flange and the surface of the floor. The cover plate may also include top and bottom portions and a third seal member interposed between the top and bottom portions.
摘要:
A distribution box for supporting a plurality of distribution jacks, each distribution jack having a first terminal and a second terminal, the distribution box being configured to permit a plurality of cables to be selectively interconnected with the plurality of distribution jacks, the distribution box includes a housing defining a hollow interior, The housing having a wall adapted to support The plurality of such distribution jacks such that the first terminal of each distribution jack is positioned in the hollow interior and the second terminal of each distribution jack is accessible from the exterior of the housing, and the housing having an opening configured to allow The cables to be routed into The hollow interior for interconnection to the first terminals of The distribution jacks; and a removable shield mountable over The opening and being adapted to seal around the cables disposed in The opening.
摘要:
An apparatus and method for protecting integrated circuits from electrical overstress and eletrostatic discharge is provided. The apparatus includes a primary EOS/ESD protection device and a feedback circuit. The feedback circuit maintain the primary EOS/ESD protection device in an off state during normal operation of the integrated circuit and switches the primary protection device to an state when an EOS/ESD event occurs at a first input pad with respect to a second input pad of the integrated circuit.