公开(公告)号：US5621897A

公开(公告)日：1997-04-15

申请号：US421114

申请日：1995-04-13

申请人： Bechara F. Boury ,  Charles E. Kuhlmann ,  Terence J. Lohman ,  Neil W. Songer ,  Ronald E. Valli

发明人： Bechara F. Boury ,  Charles E. Kuhlmann ,  Terence J. Lohman ,  Neil W. Songer ,  Ronald E. Valli

IPC分类号： G06F13/362 ,  G06F13/36

CPC分类号： G06F13/362

摘要： An arrangement and method for arbitration to enable split transaction bus protocols provides for a slave to assert a mask signal that sets a mask bit in a mask register when the slave is not ready to complete a requested transaction. A requesting master is forced off the bus and prevented from re-arbitrating while the mask bit is set in the register. When the slave is ready to complete the transaction, a release master signal is asserted which causes the bit in the shift register to be reset. The requesting master is then able to re-arbitrate for use of the bus to complete the transaction. The usable bandwidth of the bus is increased since other masters are able to arbitrate and use the bus until the slave is ready to complete the transaction with the first requesting master.

摘要翻译： 用于启用拆分事务总线协议的仲裁的布置和方法提供从机在从机未准备好完成所请求的事务时，提供设置掩码寄存器中的掩码位的掩码信号。 请求主机被强制关闭总线，并防止在掩码位置位在寄存器中进行重新仲裁。 当从机准备好完成交易时，断言主信号被断言，这使得移位寄存器中的位被复位。 然后，请求主机能够重新仲裁以使用总线来完成交易。 总线的可用带宽增加，因为其他主机能够仲裁和使用总线，直到从机准备完成与第一请求主机的交易。

公开(公告)号：US20120254644A1

公开(公告)日：2012-10-04

申请号：US13077727

申请日：2011-03-31

申请人： William Knolla ,  Douglas R. Moran ,  Neil W. Songer

发明人： William Knolla ,  Douglas R. Moran ,  Neil W. Songer

IPC分类号： G06F1/32

CPC分类号： G06F1/3209

摘要： Embodiments of methods and apparatus for entering an activity alignment on state from an activity alignment off state; masking one or more traffic flows that are received during at least a part of the activity alignment on state; and entering the activity alignment off state from the activity alignment on state, after being in the activity alignment on state for at least a first time period, based at least in part on said masking the one or more traffic flows. Additional variants and embodiments are also disclosed.

摘要翻译： 用于从活动对准关闭状态进入状态的活动对准的方法和装置的实施例; 掩蔽在活动对齐状态的至少一部分期间接收的一个或多个业务流; 以及至少部分地基于所述屏蔽所述一个或多个业务流，在所述活动对齐状态之后，在所述活动对齐状态之后，在处于所述活动对准状态至少第一时间段之后进入所述活动对齐关闭状态。 还公开了其它变型和实施方案。

公开(公告)号：US6041372A

公开(公告)日：2000-03-21

申请号：US774515

申请日：1996-12-30

申请人： Frank P. Hart ,  Ravi Nagaraj ,  James L. Noble ,  Neil W. Songer

发明人： Frank P. Hart ,  Ravi Nagaraj ,  James L. Noble ,  Neil W. Songer

IPC分类号： G06F13/40 ,  G06F13/10 ,  H03K5/09

CPC分类号： G06F13/4068

摘要： A method and apparatus for converting a signal from a first voltage level to a second voltage level before providing the signal to a processor. A circuit board includes an interface for coupling the circuit board to a peripheral subsystem via a socket. The circuit board also includes a processor that receives signals of a first voltage level, a first signal line, and a second signal line. The first signal line is coupled to the interface and provides a reference signal to the peripheral subsystem that indicates the first voltage level. The second signal line is also coupled to the interface and provides a subsystem signal back from the peripheral subsystem after the signal has been converted to the first voltage level.

摘要翻译： 一种用于在将信号提供给处理器之前将信号从第一电压电平转换为第二电压电平的方法和装置。 电路板包括用于经由插座将电路板耦合到外围子系统的接口。 电路板还包括接收第一电压电平，第一信号线和第二信号线的信号的处理器。 第一信号线耦合到接口，并向指示第一电压电平的外围子系统提供参考信号。 第二信号线还耦合到接口并且在信号已被转换到第一电压电平之后从外围子系统提供子系统信号。

公开(公告)号：US5664197A

公开(公告)日：1997-09-02

申请号：US426825

申请日：1995-04-21

申请人： James P. Kardach ,  Sung-Soo Cho ,  Jim S. Cheng ,  Debra T. Cohen ,  John W. Horigan ,  Nader Raygani ,  Seyed Yahay Sotoudeh ,  David I. Poisner ,  Neil W. Songer

发明人： James P. Kardach ,  Sung-Soo Cho ,  Jim S. Cheng ,  Debra T. Cohen ,  John W. Horigan ,  Nader Raygani ,  Seyed Yahay Sotoudeh ,  David I. Poisner ,  Neil W. Songer

IPC分类号： G06F13/28 ,  G06F13/30 ,  G06F13/364 ,  G06F13/00

CPC分类号： G06F13/28 ,  G06F13/30 ,  G06F13/364

摘要： A computer system that implements a direct memory access (DMA) request passing protocol. The computer system may comprise a Peripheral Component Interconnect (PCI) bus that includes an electrical interface as specified by a PCI Local Bus standard. The PCI bus is coupled to at least one DMA agent and a DMA controller. The DMA agent issues DMA requests to the DMA controller using the electrical interface of the PCI bus. According to one embodiment, a system I/O controller receives the DMA requests and passes them on to the DMA controller, which arbitrates the DMA requests and passes back a grant to the system I/O controller. The system I/O controller uses the electrical interface of the PCI bus to pass the grant to the DMA agent. The same DMA request passing protocol may be implemented in any bus having an electrical interface that specifies a unique request signal line for each bus agent of the bus.

摘要翻译： 实现直接存储器访问（DMA）请求传递协议的计算机系统。 计算机系统可以包括外围组件互连（PCI）总线，其包括由PCI本地总线标准指定的电接口。 PCI总线耦合到至少一个DMA代理和DMA控制器。 DMA代理使用PCI总线的电接口向DMA控制器发出DMA请求。 根据一个实施例，系统I / O控制器接收DMA请求并将它们传递到DMA控制器，DMA控制器对DMA请求进行仲裁，并将授权传回给系统I / O控制器。 系统I / O控制器使用PCI总线的电接口将授权传递给DMA代理。 相同的DMA请求传递协议可以在具有为总线的每个总线代理指定唯一请求信号线的电接口的任何总线中实现。