公开(公告)号：US20180174996A1

公开(公告)日：2018-06-21

申请号：US15898604

申请日：2018-02-18

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Michael Mostovoy ,  Gokul Kumar ,  Ning Ye ,  Hem Takiar ,  Venkatesh P. Ramachandra ,  Vinayak Ghatawade ,  Chih-Chin Liao

IPC: H01L23/00 ,  H01L21/56 ,  H01L25/00 ,  H01L25/065 ,  H01L21/78

CPC classification number: H01L24/49 ,  H01L21/56 ,  H01L21/78 ,  H01L24/06 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0612 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48499 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/78301 ,  H01L2924/00014 ,  H01L2924/1436 ,  H01L2924/14511 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/01079 ,  H01L2224/45099 ,  H01L2924/00012

Abstract: A wide I/O semiconductor device is disclosed including a memory die stack wire bonded to an interface chip. The stack of memory die may be wire bonded to the interface chip using a wire bond scheme optimized for die-to-die connection and optimized for the large number of wire bond connections in a wide I/O semiconductor device. This method can achieve significant BW increase by improving packaging yield and costs, not possible with current packaging schemes.

公开(公告)号：US09899347B1

公开(公告)日：2018-02-20

申请号：US15454194

申请日：2017-03-09

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Michael Mostovoy ,  Gokul Kumar ,  Ning Ye ,  Hem Takiar ,  Venkatesh P. Ramachandra ,  Vinayak Ghatawade ,  Chih-Chin Liao

IPC: H01L25/065 ,  H01L25/00 ,  H01L23/00 ,  H01L21/56 ,  H01L21/78

CPC classification number: H01L24/49 ,  H01L21/56 ,  H01L21/78 ,  H01L24/06 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/0612 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48499 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/78301 ,  H01L2924/00014 ,  H01L2924/1436 ,  H01L2924/14511 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/01079 ,  H01L2224/45099 ,  H01L2924/00012

Abstract: A wide I/O semiconductor device is disclosed including a memory die stack wire bonded to an interface chip. The stack of memory die may be wire bonded to the interface chip using a wire bond scheme optimized for die-to-die connection and optimized for the large number of wire bond connections in a wide I/O semiconductor device. This method can achieve significant BW increase by improving packaging yield and costs, not possible with current packaging schemes.