公开(公告)号：US12119321B2

公开(公告)日：2024-10-15

申请号：US17947536

申请日：2022-09-19

申请人： EPISTAR CORPORATION

发明人： Shih-An Liao ,  Shau-Yi Chen ,  Ming-Chi Hsu ,  Chun-Hung Liu ,  Min-Hsun Hsieh

IPC分类号： H01L23/48 ,  H01L23/00 ,  H01L33/62 ,  H01L33/30 ,  H01L33/64

CPC分类号： H01L24/16 ,  H01L24/06 ,  H01L24/13 ,  H01L24/29 ,  H01L24/73 ,  H01L24/83 ,  H01L33/62 ,  H01L24/20 ,  H01L24/32 ,  H01L24/48 ,  H01L33/30 ,  H01L33/647 ,  H01L2224/04105 ,  H01L2224/0612 ,  H01L2224/13309 ,  H01L2224/13311 ,  H01L2224/13313 ,  H01L2224/13339 ,  H01L2224/13499 ,  H01L2224/16058 ,  H01L2224/16105 ,  H01L2224/16227 ,  H01L2224/165 ,  H01L2224/2929 ,  H01L2224/29309 ,  H01L2224/29311 ,  H01L2224/29313 ,  H01L2224/29324 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/2939 ,  H01L2224/294 ,  H01L2224/29499 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/83121 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83203 ,  H01L2224/83851 ,  H01L2224/83862 ,  H01L2224/8388 ,  H01L2224/83886 ,  H01L2924/10329 ,  H01L2924/1033 ,  H01L2924/10331 ,  H01L2924/12041 ,  H01L2924/15156 ,  H01L2224/29344 ,  H01L2924/00014 ,  H01L2224/29347 ,  H01L2924/00014 ,  H01L2224/29324 ,  H01L2924/00014 ,  H01L2224/29355 ,  H01L2924/00014 ,  H01L2224/29339 ,  H01L2924/00014 ,  H01L2224/29313 ,  H01L2924/00014 ,  H01L2224/29309 ,  H01L2924/00014 ,  H01L2224/29311 ,  H01L2924/01083 ,  H01L2924/01047 ,  H01L2224/29311 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2224/2939 ,  H01L2924/00014 ,  H01L2224/294 ,  H01L2924/00014 ,  H01L2224/83203 ,  H01L2924/00012

摘要： A semiconductor device comprises a semiconductor die, comprising a stacking structure, a first bonding pad with a first bonding surface positioned away from the stack structure, and a second bonding pad; a carrier comprising a connecting surface; a third bonding pad which comprises a second bonding surface and is arranged on the connecting surface, and a fourth bonding pad arranged on the connecting surface of the carrier; and a conductive connecting layer comprising a first conductive part, comprising a first outer contour, and formed between and directly contacting the first bonding pad and the third bonding pad; a second conductive part formed between the second bonding pad and the fourth bonding pad; and a blocking part covering the first conductive part to form a covering area, wherein the first bonding surface comprises a first position which is the closest to the carrier within the covering area and a second position which is the farthest from the carrier within the covering area in a cross section view, and a distance from the first position to the first out contour is greater than that from the second position to the first outer contour.

公开(公告)号：US20240234228A9

公开(公告)日：2024-07-11

申请号：US18398680

申请日：2023-12-28

申请人： ROHM CO., LTD.

发明人： Kunihiro KOMIYA

IPC分类号： H01L23/31 ,  H01L23/00 ,  H01L23/50 ,  H01L23/528 ,  H01L23/532

CPC分类号： H01L23/3114 ,  H01L23/50 ,  H01L23/528 ,  H01L23/53214 ,  H01L23/53228 ,  H01L23/53242 ,  H01L24/06 ,  H01L24/10 ,  H01L24/13 ,  H01L24/14 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/0612 ,  H01L2224/13 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/14104 ,  H01L2224/1413 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/30107

摘要： The semiconductor device has the CSP structure and may include a plurality of electrode pads formed on a semiconductor integrated circuit in order to input/output signals from/to exterior; solder bumps for making external lead electrodes; and rewiring. The solder bumps may be arranged in two rows along the periphery of the semiconductor device. The electrode pads may be arranged inside the outermost solder bumps so as to be interposed between the two rows of solder bumps. Each trace of the rewiring may be extended from an electrode pad and may be connected to any one of the outermost solder bumps or any one of the inner solder bumps.

公开(公告)号：US11916031B2

公开(公告)日：2024-02-27

申请号：US17745225

申请日：2022-05-16

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chih-Chia Hu ,  Ching-Pin Yuan ,  Sung-Feng Yeh ,  Sen-Bor Jan ,  Ming-Fa Chen

IPC分类号： H01L23/00 ,  H01L23/544 ,  H01L25/065 ,  H01L23/522

CPC分类号： H01L24/06 ,  H01L23/522 ,  H01L23/544 ,  H01L24/05 ,  H01L24/08 ,  H01L24/09 ,  H01L24/80 ,  H01L25/0657 ,  H01L2223/54426 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05569 ,  H01L2224/0603 ,  H01L2224/0612 ,  H01L2224/06051 ,  H01L2224/06132 ,  H01L2224/08121 ,  H01L2224/08145 ,  H01L2224/091 ,  H01L2224/0913 ,  H01L2224/09051 ,  H01L2224/8001 ,  H01L2224/80011 ,  H01L2224/80013 ,  H01L2224/8013 ,  H01L2224/80132 ,  H01L2224/80203 ,  H01L2224/80357 ,  H01L2224/80815 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80905 ,  H01L2224/80986 ,  H01L2924/3511 ,  H01L2224/091 ,  H01L2924/00012 ,  H01L2224/05555 ,  H01L2924/00012 ,  H01L2924/3511 ,  H01L2924/00

摘要： A semiconductor device including a first die and a second die bonded to one another. The first die includes a first passivation layer over a substrate, and first bond pads in the first passivation layer. The second die includes a second passivation layer, which may be bonded to the first passivation layer, and second bond pads in the second passivation layer, which may be bonded to the first bond pads. The second bond pads include inner bond pads and outer bond pads. The outer bond pads may have a greater diameter than the inner bond pads as well as the first bond pads.

公开(公告)号：US11901251B2

公开(公告)日：2024-02-13

申请号：US17854316

申请日：2022-06-30

申请人： ROHM CO., LTD.

发明人： Kunihiro Komiya

IPC分类号： H01L23/31 ,  H01L23/00 ,  H01L23/50 ,  H01L23/528 ,  H01L23/532

CPC分类号： H01L23/3114 ,  H01L23/50 ,  H01L23/528 ,  H01L23/53214 ,  H01L23/53228 ,  H01L23/53242 ,  H01L24/06 ,  H01L24/10 ,  H01L24/13 ,  H01L24/14 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/0612 ,  H01L2224/13 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/1413 ,  H01L2224/14104 ,  H01L2924/014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L24/13 ,  H01L2924/00 ,  H01L2224/13 ,  H01L2924/00 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2224/05124 ,  H01L2924/00014 ,  H01L2224/05144 ,  H01L2924/00014 ,  H01L2224/05147 ,  H01L2924/00014

摘要： The semiconductor device has the CSP structure and may include a plurality of electrode pads formed on a semiconductor integrated circuit in order to input/output signals from/to exterior; solder bumps for making external lead electrodes; and rewiring. The solder bumps may be arranged in two rows along the periphery of the semiconductor device. The electrode pads may be arranged inside the outermost solder bumps so as to be interposed between the two rows of solder bumps. Each trace of the rewiring may be extended from an electrode pad and may be connected to any one of the outermost solder bumps or any one of the inner solder bumps.

公开(公告)号：US11699641B2

公开(公告)日：2023-07-11

申请号：US17499018

申请日：2021-10-12

申请人： ROHM CO., LTD.

发明人： Hiroaki Matsubara ,  Yasumasa Kasuya

IPC分类号： H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L23/64 ,  H01L23/00 ,  H01L23/31

CPC分类号： H01L23/49575 ,  H01L21/48 ,  H01L21/56 ,  H01L23/4952 ,  H01L23/49503 ,  H01L23/49517 ,  H01L23/49531 ,  H01L23/49537 ,  H01L23/49548 ,  H01L23/645 ,  H01L24/06 ,  H01L24/45 ,  H01L24/49 ,  H01L24/85 ,  H01L23/3107 ,  H01L23/49582 ,  H01L24/05 ,  H01L24/48 ,  H01L24/78 ,  H01L2224/05014 ,  H01L2224/05554 ,  H01L2224/0612 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/49109 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/78301 ,  H01L2224/85205 ,  H01L2224/85439 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19042 ,  H01L2924/207 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00014 ,  H01L2224/45099 ,  H01L2924/00014 ,  H01L2224/05599 ,  H01L2224/85439 ,  H01L2924/00014 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/48091 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2224/78301 ,  H01L2924/00014 ,  H01L2224/48465 ,  H01L2224/48247 ,  H01L2924/00 ,  H01L2924/13055 ,  H01L2924/00 ,  H01L2924/13091 ,  H01L2924/00

摘要： A semiconductor device includes a semiconductor element circuit, a conductive support and a sealing resin. The conductive support includes a die pad, first terminals spaced in a first direction, second terminals spaced in the first direction and opposite to the first terminals in a second direction perpendicular to the first direction, and a support terminal connected to the die pad. The sealing resin encapsulates portions of the first and second terminals, a portion of the support terminal, the semiconductor element circuit and the die pad. The sealing resin has two first side surfaces spaced apart in the second direction and two second side surfaces spaced apart in the first direction. The first terminals and second terminals are exposed from the first side surfaces, while none of the elements of the conductive support is exposed from the second side surfaces.

公开(公告)号：US20180358296A1

公开(公告)日：2018-12-13

申请号：US15778398

申请日：2015-12-22

申请人： INTEL CORPORATION

发明人： Eric J. LI ,  Nitin DESHPANDE ,  Shawna M. LIFF ,  Omkar KARHADE ,  Amram EITAN ,  Timothy A. GOSSELIN

IPC分类号： H01L23/538 ,  H01L23/367 ,  H01L21/48

CPC分类号： H01L23/5381 ,  H01L21/4853 ,  H01L21/4871 ,  H01L23/13 ,  H01L23/36 ,  H01L23/367 ,  H01L23/48 ,  H01L23/5385 ,  H01L23/5386 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/0612 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/92125 ,  H01L2924/15159 ,  H01L2924/014 ,  H01L2924/00014

摘要： An electronic assembly that includes a substrate having an upper surface and a bridge that includes an upper surface. The bridge is within a cavity in the upper surface of the substrate. A first electronic component is attached to the upper surface of the bridge and the upper surface of the substrate and a second electronic component is attached to the upper surface of the bridge and the upper surface of the substrate, wherein the bridge electrically connects the first electronic component to the second electronic component.

公开(公告)号：US09972555B2

公开(公告)日：2018-05-15

申请号：US15662127

申请日：2017-07-27

申请人： RENESAS ELECTRONICS CORPORATION

发明人： Soshi Kuroda ,  Tatsuya Kobayashi ,  Takanori Aoki

IPC分类号： H01L29/76 ,  H01L23/31 ,  H01L23/00 ,  H01L23/498 ,  H01L29/06 ,  H01L23/58 ,  H01L23/535 ,  H01L21/66 ,  H01L23/29 ,  H01L21/78 ,  H01L21/56

CPC分类号： H01L23/3128 ,  H01L21/561 ,  H01L21/565 ,  H01L21/78 ,  H01L22/32 ,  H01L23/293 ,  H01L23/3135 ,  H01L23/49838 ,  H01L23/535 ,  H01L23/562 ,  H01L23/585 ,  H01L24/05 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L29/0649 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/0612 ,  H01L2224/06135 ,  H01L2224/29014 ,  H01L2224/29015 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/30183 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49431 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2224/83201 ,  H01L2224/8385 ,  H01L2224/92247 ,  H01L2924/0665 ,  H01L2924/10155 ,  H01L2924/10161 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/0655

摘要： To provide a semiconductor device having improved reliability. The semiconductor device has a wiring board, bonding land, semiconductor chip mounted on the wiring board via an adhesive layer and having a pad electrode, bonding wire connecting the pad electrode with the bonding land, and sealing body. The sealing body is, in a circuit formation region, in contact with an organic protection film and, in a scribe region and a region between the pad electrode and the scribe region, in contact with a surface protection film while not in contact with the organic protection film. A first side surface is closer to the circuit formation region side than a second one. The adhesive layer covers entirety of the semiconductor chip back surface and the second side surface of the semiconductor chip. The first side surface is in contact with the sealing body without being covered with the adhesive layer.

公开(公告)号：US09972505B2

公开(公告)日：2018-05-15

申请号：US14943900

申请日：2015-11-17

申请人： RENESAS ELECTRONICS CORPORATION

发明人： Masahiro Matsumoto ,  Kazuyoshi Maekawa ,  Yuichi Kawano

IPC分类号： H01L23/495 ,  H01L21/48 ,  H01L23/00 ,  H01L23/532 ,  H01L21/768 ,  H01L23/31 ,  H01L23/525

CPC分类号： H01L21/4817 ,  H01L21/76852 ,  H01L23/3121 ,  H01L23/525 ,  H01L23/53238 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L2221/1078 ,  H01L2224/02166 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05007 ,  H01L2224/05008 ,  H01L2224/05075 ,  H01L2224/05548 ,  H01L2224/05664 ,  H01L2224/0612 ,  H01L2224/131 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45644 ,  H01L2224/45664 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00

摘要： The present invention makes it possible to improve the reliability of a semiconductor device. The semiconductor device has, over a semiconductor substrate, a pad electrode formed at the uppermost layer of a plurality of wiring layers, a surface protective film having an opening over the pad electrode, a redistribution line being formed over the surface protective film and having an upper surface and a side surface, a sidewall barrier film comprising an insulating film covering the side surface and exposing the upper surface of the redistribution line, and a cap metallic film covering the upper surface of the redistribution line. Then the upper surface and side surface of the redistribution line are covered with the cap metallic film or the sidewall barrier film and the cap metallic film and the sidewall barrier film have an overlapping section.

公开(公告)号：US09960671B2

公开(公告)日：2018-05-01

申请号：US14588112

申请日：2014-12-31

申请人： Avago Technologies General IP (Singapore) Pte. Ltd.

发明人： Dominique Ho ,  Kwee Chong Chang ,  Kah Weng Lee ,  Brian J. Misek

IPC分类号： H02M3/06 ,  H02M1/32 ,  H01L23/00 ,  H01L25/065 ,  H01L23/60 ,  H01L23/58 ,  H01L23/48 ,  H01L23/495 ,  H01L23/522 ,  H01L23/31

CPC分类号： H02M3/06 ,  H01L23/3107 ,  H01L23/48 ,  H01L23/49537 ,  H01L23/49551 ,  H01L23/49575 ,  H01L23/5223 ,  H01L23/58 ,  H01L23/60 ,  H01L24/05 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/0612 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/06575 ,  H01L2924/00014 ,  H01L2924/07025 ,  H01L2924/15724 ,  H01L2924/15747 ,  H01L2924/1576 ,  H01L2924/1711 ,  H01L2924/172 ,  H01L2924/3025 ,  H01L2924/386 ,  H02M1/32 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599

摘要： A capacitive isolation system, capacitive isolator, and method of operating the same are disclosed. The capacitive isolation system is described to include a first semiconductor die and a second semiconductor die each having capacitive elements established thereon and positioned in a face-to-face configuration. An isolation layer is provided between the first and second semiconductor die so as to establish an isolation boundary therebetween. Capacitive coupling is used to carry information across the isolation boundary.

公开(公告)号：US09882011B2

公开(公告)日：2018-01-30

申请号：US15286749

申请日：2016-10-06

申请人： Mitsubishi Electric Corporation

发明人： Koichi Fujita

IPC分类号： H01L27/148 ,  H01L29/417 ,  H01L21/283 ,  H01L21/768 ,  H01L23/552 ,  H01L23/00 ,  H01L29/08 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L29/4175 ,  H01L21/283 ,  H01L21/7682 ,  H01L21/76895 ,  H01L23/552 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L29/0847 ,  H01L29/402 ,  H01L29/42356 ,  H01L29/66568 ,  H01L29/78 ,  H01L29/7835 ,  H01L2224/0401 ,  H01L2224/05025 ,  H01L2224/05553 ,  H01L2224/0603 ,  H01L2224/0612 ,  H01L2224/1146 ,  H01L2224/13101 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/3025 ,  H01L2924/014 ,  H01L2224/05599

摘要： A semiconductor device having electrodes of three or more levels, includes: a semiconductor substrate; an epitaxial layer formed on the semiconductor substrate; a transistor formed on the epitaxial layer; a source electrode formed on the epitaxial layer and electrically connected to a source of the transistor; and a gate drawing electrode formed on the epitaxial layer and electrically connected to a gate of the transistor, wherein the source electrode includes a first source electrode, a second source electrode which is an electrode at a second or higher level on the first source electrode, and a third source electrode which is an electrode at a third or higher level on the second source electrode and above the gate drawing electrode, and the gate drawing electrode is an electrode at a second or higher level on the first source electrode and surrounded with the first, second, and third source electrodes.