公开(公告)号：US20210043671A1

公开(公告)日：2021-02-11

申请号：US16940458

申请日：2020-07-28

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Seiichi YONEDA ,  Yusuke NEGORO

IPC: H01L27/146 ,  H01L23/00

Abstract: An imaging device includes a first semiconductor substrate and a second semiconductor substrate. The first semiconductor substrate includes a photoelectric conversion device and a first transistor. The second semiconductor substrate includes a second transistor, a third transistor, and a fourth transistor. One electrode of the photoelectric conversion device is electrically connected to one of a source and a drain of the first transistor. The other of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the second transistor and a gate of the third transistor. One of a source and a drain of the third transistor is electrically connected to one of a source and a drain of the fourth transistor. The photoelectric conversion device and at least parts of the second transistor, the third transistor, and the fourth transistor overlap with each other.

公开(公告)号：US20230397444A1

公开(公告)日：2023-12-07

申请号：US18024286

申请日：2021-09-09

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yusuke NEGORO ,  Hideaki SHISHIDO

IPC: H10B80/00 ,  H01L27/146 ,  H10K39/00 ,  H04N25/771 ,  H04N25/79

CPC classification number: H10B80/00 ,  H01L27/14645 ,  H01L27/14605 ,  H10K39/601 ,  H04N25/771 ,  H04N25/79 ,  H01L24/08

Abstract: An imaging device that has an image processing function and is capable of operating at high speed is provided. The imaging device has an additional function such as image processing, image data obtained by an imaging operation is binarized in a pixel portion, and a product-sum operation is performed using the binarized data. A memory circuit is provided in the pixel portion and retains a weight coefficient used for the product-sum operation. Thus, an arithmetic operation can be performed without the weight coefficient read from the outside every time, so that power consumption can be reduced. Furthermore, a pixel circuit, a memory circuit, and the like and a product-sum operation circuit and the like are formed to be stacked; therefore, the length of a wiring between the circuits can be shortened, and a low-power consumption operation and a high-speed operation can be performed.

公开(公告)号：US20230156376A1

公开(公告)日：2023-05-18

申请号：US17995803

申请日：2021-04-09

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Seiichi YONEDA ,  Yusuke NEGORO ,  Takeya HIROSE ,  Shunsuke SATO ,  Shunpei YAMAZAKI

IPC: H04N25/78 ,  H04N25/771 ,  H04N25/79 ,  H10K39/32

CPC classification number: H04N25/78 ,  H04N25/771 ,  H04N25/79 ,  H10K39/32

Abstract: An imaging device that has an image processing function and is capable of a high-speed operation is provided. The imaging device has an additional function such as image processing, and can retain analog data obtained by an image capturing operation in pixels and extract data obtained by multiplying the analog data by a given weight coefficient. In the imaging device, the data is stored in a memory cell and pooling processing of data stored in a plurality of memory cells can be performed. The pixels are provided so as to have a region overlapping with at least one of the memory cells, a pooling processing circuit, and a reading circuit of the pixels; thus, an increase in the area of the imaging device can be inhibited even with an additional function.

公开(公告)号：US20220406849A1

公开(公告)日：2022-12-22

申请号：US17777384

申请日：2020-11-11

Applicant: Semiconductor Energy Laboratory Co., Ltd

Inventor： Takuro Kanemura ,  Yusuke NEGORO

IPC: H01L27/30 ,  H04N5/33

Abstract: An imaging device having a color imaging function and an infrared imaging function is provided. The imaging device has a structure in which a first photoelectric conversion device and a second photoelectric conversion device are stacked, and the second photoelectric conversion device generates electric charge by absorbing infrared light and transmits light having a wavelength of a higher energy than that of infrared light. The first photoelectric conversion device is positioned to overlap with the second photoelectric conversion device, and generates electric charge by absorbing light (visible light) passing through the second photoelectric conversion device. Thus, a subpixel for color imaging and a subpixel for infrared imaging can be positioned to overlap with each other, and an infrared imaging function can be added without a decrease in the definition of color imaging.

公开(公告)号：US20220344392A1

公开(公告)日：2022-10-27

申请号：US17640430

申请日：2020-08-25

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Seiichi YONEDA ,  Yusuke NEGORO

IPC: H01L27/146 ,  H04N5/3745 ,  H04N5/355

Abstract: An imaging device capable of taking an image in both a dark environment and a bright environment in a light amount range equivalent to or greater than that of human vision is desired. A wide dynamic range and high image quality are achieved. In order to obtain an image with a widened dynamic range, two capacitors, a large capacitor and a small capacitor, are provided in one pixel. The large capacitor is formed to be interposed between a transistor for controlling the amount of charge overflowed from the small capacitor and a transistor for resetting accumulated charge, and OS transistors are used as these two transistors. The OS transistor has extremely low off-state current characteristics, and thus can widen the dynamic range of imaging.

公开(公告)号：US20220279140A1

公开(公告)日：2022-09-01

申请号：US17630074

申请日：2020-07-28

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Seiichi YONEDA ,  Hiromichi GODO ,  Yusuke NEGORO ,  Hiroki INOUE ,  Takahiro FUKUTOME

IPC: H04N5/378 ,  H04N5/347 ,  H04N5/376

Abstract: An imaging device with a novel structure is provided. The imaging device includes an imaging region provided with a plurality of pixels. The plurality of pixels included in the imaging region include a first pixel and a second pixel. The imaging device has a function of selecting a first region or a second region. The first region includes the same number of pixels as the second region. The first region includes at least the first and second pixels. The second region includes at least the second pixel. The pixels included in the first region or the second region have a function of outputting imaging signals obtained by the pixels. The imaging device generates first image data by concurrently reading the imaging signals output from the pixels included in the first region and performing arithmetic operation on the signals. The imaging device generates second image data by concurrently reading the imaging signals output from the pixels included in the second region and performing arithmetic operation on the signals. A first conceptual image can be generated with the use of the first image data and the second image data.

公开(公告)号：US20210134860A9

公开(公告)日：2021-05-06

申请号：US16615156

申请日：2018-05-16

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Takayuki IKEDA ,  Yoshiyuki KUROKAWA ,  Shintaro HARADA ,  Hidetomo KOBAYASHI ,  Roh YAMAMOTO ,  Kiyotaka KIMURA ,  Takashi NAKAGAWA ,  Yusuke NEGORO

IPC: H01L27/146 ,  H04N5/341 ,  H04N5/374 ,  H01L29/786 ,  H04N5/3745 ,  H01L27/12

Abstract: An imaging device capable of image processing is provided.
The imaging device can retain analog data (image data) obtained by an image-capturing operation in a pixel and perform a product-sum operation of the analog data and a predetermined weight coefficient in the pixel to convert the data into binary data. When the binary data is taken in a neural network or the like, processing such as image recognition can be performed. Since enormous volumes of image data can be retained in pixels in the state of analog data, processing can be performed efficiently.

公开(公告)号：US20230396899A1

公开(公告)日：2023-12-07

申请号：US18024084

申请日：2021-09-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yusuke NEGORO ,  Hideaki SHISHIDO

IPC: H04N25/79 ,  H04N25/77 ,  H04N25/78

CPC classification number: H04N25/79 ,  H04N25/78 ,  H04N25/77

Abstract: The present invention relates to a highly functional imaging device that can be manufactured through a small number of steps. The imaging device is formed in such a manner that a first stacked body in which a plurality of devices are stacked and a second stacked body in which a plurality of devices are stacked are bonded to each other. For example, a pixel circuit, a driver circuit of a pixel, and the like can be provided in the first stacked body, and a reading circuit of the pixel circuit, a memory circuit, a driver circuit of the memory circuit, and the like can be provided in the second stacked body. With these structures, the imaging device which is small can be formed. Furthermore, wiring delay or the like can be prevented by stacking circuits, so that high-speed operation can be performed.

公开(公告)号：US20230198509A1

公开(公告)日：2023-06-22

申请号：US18008287

申请日：2021-07-12

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takeya HIROSE ,  Seiichi YONEDA ,  Yusuke NEGORO

IPC: H03K3/356

CPC classification number: H03K3/35613 ,  H01L29/78648

Abstract: A semiconductor device with low power consumption can be provided. The semiconductor device includes a differential circuit and a latch circuit, the differential circuit includes a transistor including an oxide semiconductor in a channel formation region, and the latch circuit includes a transistor including a single semiconductor or a compound semiconductor in a channel formation region. The differential circuit and the latch circuit include an overlap region.

公开(公告)号：US20230179888A1

公开(公告)日：2023-06-08

申请号：US18008302

申请日：2021-07-12

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunsuke SATO ,  Seiichi YONEDA ,  Yusuke NEGORO ,  Takeya HIROSE ,  Shunpei YAMAZAKI

IPC: H04N25/77

CPC classification number: H04N25/77

Abstract: An imaging device that has an image processing function and is capable of operating at high speed is provided. The imaging device has an additional function such as image processing, image data obtained by an imaging operation is binarized in a pixel unit, and a product-sum operation is performed using the binarized data. A memory circuit is provided in the pixel unit and retains a weight coefficient used for the product-sum operation. Thus, an arithmetic operation can be performed without the weight coefficient read from the outside every time, whereby power consumption can be reduced. Furthermore, a pixel circuit, a memory circuit, and the like and a product-sum operation circuit and the like are stacked, so that the lengths of wirings between the circuits can be reduced, and high-speed operation with low power consumption can be performed.