公开(公告)号：US11735177B2

公开(公告)日：2023-08-22

申请号：US16711889

申请日：2019-12-12

Applicant: Silicon Laboratories Inc.

Inventor： Antonio Torrini ,  Ramin Khoini-Poorfard ,  Sebastian Ahmed

IPC: G10L15/22 ,  G10L25/18 ,  G10L15/16 ,  G10L25/78 ,  G10L15/06 ,  G06N3/08 ,  G10L25/24 ,  G06N3/045 ,  G10L15/08

CPC classification number: G10L15/22 ,  G06N3/045 ,  G06N3/08 ,  G10L15/063 ,  G10L15/16 ,  G10L25/18 ,  G10L25/24 ,  G10L25/78 ,  G10L2015/088 ,  G10L2015/223

Abstract: A system and method of keyword spotting using two neural networks is disclosed. The system is in sleep mode most of the time, and wakes up periodically. Upon waking, a limited duration of audio is examined. This may be performed using an auxiliary neural network. If any audio activity is detected in this duration, the system fully wakes and examines a longer duration of audio for keywords. The keyword spotting is also performed by the main neural network, which may be a convolutional neural network (CNN).

公开(公告)号：US20220414049A1

公开(公告)日：2022-12-29

申请号：US17361240

申请日：2021-06-28

Applicant: Silicon Laboratories Inc.

Inventor： Matthew Brandon Gately ,  Eric Jonathan Deal ,  Mark Willard Johnson ,  Sebastian Ahmed

IPC: G06F15/173 ,  G06F9/38

Abstract: An apparatus includes an array processor to process array data. The array data are arranged in a memory. The array data are specified with programmable per-dimension size and stride values.

公开(公告)号：US20210390965A1

公开(公告)日：2021-12-16

申请号：US16898806

申请日：2020-06-11

Applicant: Silicon Laboratories Inc.

Inventor： Antonio Torrini ,  Sebastian Ahmed

IPC: G10L19/02 ,  G10L25/18

Abstract: A system and method of recording and transmitting compressed audio signals over a network is disclosed. The end node device first converts the audio signal to a spectrogram, which is commonly used by machine learning algorithms to perform speech recognition. The end node device then compresses the spectrogram prior to transmission. In certain embodiments, the compression is performed using Discrete Cosine Transforms (DCT). Furthermore, in some embodiments, the DCT is performed on the difference between two columns of the spectrogram. Further, in some embodiments, a function that replaces values below a predetermined threshold with zeroes in the Encoded Spectrogram is utilized. These functions may be performed in hardware or software.

公开(公告)号：US20210096207A1

公开(公告)日：2021-04-01

申请号：US16587221

申请日：2019-09-30

Applicant: Silicon Laboratories Inc.

Inventor： Antonio Torrini ,  Sebastian Ahmed ,  Joel Kauppo ,  Sauli Johannes Lehtimaki

IPC: G01S3/04 ,  G06N3/08

Abstract: A system and method of determining the angle of arrival or departure using a neural network is disclosed. The system collects a plurality of I and Q samples as a packet containing a constant tone extension is being received. The I and Q samples are used to form I and Q arrays, which are used as the input to the neural network. The neural network produces a first output representative of the azimuth angle and a second output representative of the elevation angle. In certain embodiments, the neural network is capable of detecting a plurality of angles, where, for each angle, there are three outputs, a first output representative of the azimuth angle, a second output representative of the elevation angle and a third output representative of the relative amplitude. In some embodiments, the neural network is configured to determine the carrier frequency offset of an incoming signal as well.

公开(公告)号：US20180349600A1

公开(公告)日：2018-12-06

申请号：US15612841

申请日：2017-06-02

Applicant: Silicon Laboratories Inc.

Inventor： Javier Elenes ,  Sebastian Ahmed ,  Lars Lydersen

IPC: G06F21/55 ,  G06F21/72

CPC classification number: G06F21/554 ,  G06F21/556 ,  G06F21/725

Abstract: An integrated circuit includes a tamper sensor that has plurality of state circuits. Each of the plurality of state circuits has a respective output that provides a respective logic state. When operating properly, the respective logic state is toggled in response to a clock signal. The respective logic state fails to toggle in response to a respective fault injection. The tamper sensor has an output that provides a fault signal in response to a difference in the respective logic state of the plurality of state circuits. Additionally, the integrated circuit includes a protected circuit, as well as a tamper response circuit. The tamper response circuit is connected to the tamper sensor and to the protected circuit. The tamper response circuit executes a protection operation to secure the protected circuit in response to the fault signal.

公开(公告)号：US09984009B2

公开(公告)日：2018-05-29

申请号：US15008650

申请日：2016-01-28

Applicant: SILICON LABORATORIES INC.

Inventor： Sebastian Ahmed ,  Thomas S. David ,  Marius Grannaes

IPC: G06F13/36 ,  G06F12/14 ,  G06F13/28 ,  G06F13/42

CPC classification number: G06F12/1491 ,  G06F13/28 ,  G06F13/4282 ,  G06F2212/1052

Abstract: A processor, such as a low-cost microcontroller unit, uses a DMA controller to facilitate direct memory transactions between hardware subsystems independently of the CPU. To enable those transactions to be carried out security, gateways are provided to the DMA controller and peripheral bridge. The gateways, which have access to multiple access policies, switch between those policies depending on a hardware context and/or subcontext, such as the bus master originating the transaction and/or the DMA channel associated with the transaction. The gateways are operable to administer those policies independently of the CPU. In various implementations, gateways are provided for the DMA controller, the peripheral bridge, and/or individual peripherals. The processor is able to support secure, fully containerized operations involving its peripherals without constant CPU intervention.