-
公开(公告)号：US20150085195A1
公开(公告)日：2015-03-26
申请号：US14453049
申请日：2014-08-06
Applicant: Silicon Laboratories Inc.
Inventor： Vitor Pereira , Ramin Khoini-Poorfard , Eric Mauger
IPC: H04N5/455 , H04N21/426 , H04N9/66
CPC classification number: H04N5/455 , H01L25/00 , H01L25/0657 , H01L2224/05554 , H01L2224/48227 , H01L2224/48464 , H01L2224/49113 , H01L2225/0651 , H04N5/4401 , H04N9/66 , H04N21/426
Abstract: Systems and methods are disclosed for MCM (multiple chip module) packages having multiple stacked demodulator dies that share one or more MCM pins. The shared pins can include clock generation pins, clock input/output pins, receive signal path input pins, voltage supply pins, ground supply pins, and/or any other desired pins. In addition to reducing footprint sizes for printed circuit board (PCB) applications, the multi-demodulator MCM package embodiments described herein also allow for improved routing of connection traces on PCBs.
Abstract translation: 公开了具有共享一个或多个MCM引脚的具有多个堆叠解调器管芯的MCM（多芯片模块）封装的系统和方法。 共享引脚可以包括时钟产生引脚，时钟输入/输出引脚，接收信号路径输入引脚，电压引脚，接地电源引脚和/或任何其他所需引脚。 除了减少印刷电路板（PCB）应用的印刷尺寸之外，本文所述的多解调器MCM封装实施例还允许改进PCB上连接迹线的布线。
-
公开(公告)号：US20220085787A1
公开(公告)日：2022-03-17
申请号：US17537075
申请日：2021-11-29
Applicant: Silicon Laboratories Inc.
Inventor： Vitor Pereira , Jeffrey A. Tindle , Mustafa H. Koroglu , Terry Lee Dickey
Abstract: A wireless transceiver including a receiver circuit coupled to an RF transceiver node, a tunable notch filter coupled between the RF transceiver node and a reference node, and a controller that programs the tunable notch filter with a selected blocker frequency and that selectively enables the tunable notch filter to attenuate at least one blocker signal. The tunable notch filter may include a variable capacitor and an inductor coupled in series between the RF transceiver node and ground. The inductor of the tunable notch filter may include a bondwire coupled between a semiconductor die and a semiconductor package. The inductance may include a physical inductor mounted on the package or a printed circuit board. The tunable notch filter may be enabled by a switch selectively coupling the filter to either the RF transceiver node or ground. The variable capacitor may be digitally programmed with digital values stored in a memory.
-
公开(公告)号：US20210175870A1
公开(公告)日：2021-06-10
申请号：US16706433
申请日：2019-12-06
Applicant: Silicon Laboratories Inc.
Inventor： Vitor Pereira , Jeffrey A. Tindle , Mustafa H. Koroglu , Terry Lee Dickey
Abstract: A wireless transceiver including a receiver circuit coupled to an RF transceiver node, a tunable notch filter coupled between the RF transceiver node and a reference node, and a controller that programs the tunable notch filter with a selected blocker frequency and that selectively enables the tunable notch filter to attenuate at least one blocker signal. The tunable notch filter may include a variable capacitor and an inductor coupled in series between the RF transceiver node and ground. The inductor of the tunable notch filter may include a bondwire coupled between a semiconductor die and a semiconductor package. The inductance may include a physical inductor mounted on the package or a printed circuit board. The tunable notch filter may be enabled by a switch selectively coupling the filter to either the RF transceiver node or ground. The variable capacitor may be digitally programmed with digital values stored in a memory.
-
公开(公告)号：US10969416B2
公开(公告)日：2021-04-06
申请号：US16219173
申请日：2018-12-13
Applicant: SILICON LABORATORIES INC.
Inventor： Vitor Pereira , Arup Mukherji
Abstract: An integrated circuit including at least one circuit node, multiple duplicate circuit blocks integrated on the integrated circuit in close proximity with each other, each including at least one device that is susceptible to random telegraph noise (RTN), and a switch circuit that swaps electrical coupling of the duplicate circuit blocks, one at a time, to the at least one circuit node in sequential cycles of a clock signal. The duplicate circuit blocks may be large functional blocks, such as an oscillator or a comparator or the like, or limited to circuits including RTN susceptible devices, such as differential pairs or the like. Each duplicate circuit block may include any number of connections for coupling to corresponding circuit nodes. The swapping may further include chopping in which multiple inputs are swapped with each other while multiple outputs are swapped with each other in consecutive clock cycles.
-
公开(公告)号：US09204080B2
公开(公告)日：2015-12-01
申请号：US14453049
申请日：2014-08-06
Applicant: Silicon Laboratories Inc.
Inventor： Vitor Pereira , Ramin Khoini-Poorfard , Eric Mauger
CPC classification number: H04N5/455 , H01L25/00 , H01L25/0657 , H01L2224/05554 , H01L2224/48227 , H01L2224/48464 , H01L2224/49113 , H01L2225/0651 , H04N5/4401 , H04N9/66 , H04N21/426
Abstract: Systems and methods are disclosed for MCM (multiple chip module) packages having multiple stacked demodulator dies that share one or more MCM pins. The shared pins can include clock generation pins, clock input/output pins, receive signal path input pins, voltage supply pins, ground supply pins, and/or any other desired pins. In addition to reducing footprint sizes for printed circuit board (PCB) applications, the multi-demodulator MCM package embodiments described herein also allow for improved routing of connection traces on PCBs.
Abstract translation: 公开了具有共享一个或多个MCM引脚的具有多个堆叠解调器管芯的MCM（多芯片模块）封装的系统和方法。 共享引脚可以包括时钟产生引脚，时钟输入/输出引脚，接收信号路径输入引脚，电压引脚，接地电源引脚和/或任何其他所需引脚。 除了减少印刷电路板（PCB）应用的印刷尺寸之外，本文所述的多解调器MCM封装实施例还允许改进PCB上连接迹线的布线。
-
Patent Agency Ranking
16.发明申请DEMODULATOR AND MULTI-CHIP MODULE FOR A MULTI-MODE RECEIVER AND METHOD THEREFOR 有权用于多模式接收器的解调器和多芯片模块及其方法公开(公告)号：US20150249856A1
公开(公告)日：2015-09-03
申请号：US14195575
申请日：2014-03-03
Applicant: Silicon Laboratories Inc.
Inventor： Vitor Pereira , Pascal Blouin , David LeGoff , Frederic Nicolas
IPC: H04N21/426 , H04N5/268 , H04N21/61 , H04N5/455 , H04N21/438 , H04N21/462
CPC classification number: H04N5/46 , H01L2224/05554 , H01L2224/48091 , H01L2224/49113 , H01L2225/06562 , H04N5/268 , H04N5/455 , H04N21/42615 , H04N21/4263 , H04N21/42676 , H04N21/4382 , H04N21/4383 , H04N21/4622 , H04N21/6112 , H04N21/6118 , H04N21/6143 , H01L2924/00014
Abstract: In one form, a multi-chip module for a multi-mode receiver includes an MCM substrate and first and second demodulator die. The MCM substrate has first and second satellite input ports, first and second terrestrial/cable input ports, and first and second transport stream ports. The first demodulator die has a satellite port coupled to the first satellite input port of the MCM substrate, a terrestrial/cable port coupled to the first terrestrial/cable input port of the MCM substrate, and first and second transport stream ports coupled to the first and second transport stream ports of the MCM substrate. The second demodulator die has a satellite port coupled to the second satellite input port of the MCM substrate, a terrestrial/cable port coupled to the second terrestrial/cable input port of the MCM substrate, and first and second transport stream ports coupled to the first and second transport stream ports of the MCM substrate.
Abstract translation: 在一种形式中，用于多模式接收器的多芯片模块包括MCM衬底和第一和第二解调器管芯。 MCM衬底具有第一和第二卫星输入端口，第一和第二地面/电缆输入端口以及第一和第二传输流端口。 第一解调器管芯具有耦合到MCM衬底的第一卫星输入端口的卫星端口，耦合到MCM衬底的第一地面/电缆输入端口的地面/电缆端口，以及耦合到第一和第二传输流端口的第一和第二传输流端口 和MCM基板的第二传输流端口。 第二解调器管芯具有耦合到MCM衬底的第二卫星输入端口的卫星端口，耦合到MCM衬底的第二地面/电缆输入端口的地面/电缆端口，以及耦合到第一和第二传输流端口的第一和第二传输流端口 和MCM基板的第二传输流端口。
-
17.发明公开公开(公告)号：US20240267005A1
公开(公告)日：2024-08-08
申请号：US18639872
申请日：2024-04-18
Applicant: Silicon Laboratories Inc.
Inventor： Rangakrishnan Srinivasan , Mustafa H. Koroglu , Zhongda Wang , Francesco Barale , Abdulkerim L. Coban , John M. Khoury , Sriharsha Vasadi , Michael S. Johnson , Vitor Pereira
CPC classification number: H03F1/26 , H03B5/04 , H03F1/30 , H03F3/245 , H03K5/00 , H03F2200/375 , H03K2005/00019
Abstract: A transmitter including a frequency synthesizer with a voltage-controlled oscillator that provides an oscillating signal, a programmable delay circuit that delays the oscillating signal to provide a delayed oscillating signal, a power amplifier that is configured to amplify the delayed oscillating signal for transmission sufficient to produce interference, and a delay controller that programs the delay circuit with a delay time that reduces interference caused by coupling from the power amplifier to the voltage-controlled oscillator. The delay circuit may be programmed to reduce control voltage change of the voltage-controlled oscillator as a function of delay change, and/or to reduce phase noise degradation at an output of the transmitter as a function of delay change. The delay may be adjusted based on detected operating temperature. A calibration value may be determined at a calibration frequency, in which a frequency offset may be determined based on a selected channel frequency.
-
公开(公告)号：US12028024B2
公开(公告)日：2024-07-02
申请号：US16705868
申请日：2019-12-06
Applicant: Silicon Laboratories Inc.
Inventor： Rangakrishnan Srinivasan , Mustafa H. Koroglu , Zhongda Wang , Francesco Barale , Abdulkerim L Coban , John M. Khoury , Sriharsha Vasadi , Michael S. Johnson , Vitor Pereira
CPC classification number: H03F1/26 , H03B5/04 , H03F1/30 , H03F3/245 , H03K5/00 , H03F2200/375 , H03K2005/00019
Abstract: A transmitter including a frequency synthesizer with a voltage-controlled oscillator that provides an oscillating signal, a programmable delay circuit that delays the oscillating signal to provide a delayed oscillating signal, a power amplifier that is configured to use the delayed oscillating signal for transmitting a signal, and a delay controller that programs the delay circuit with a delay time that reduces interference caused by coupling from the power amplifier to the voltage-controlled oscillator. The delay circuit may be programmed to reduce control voltage change of the voltage-controlled oscillator as a function of delay change, and/or to reduce phase noise degradation at an output of the transmitter as a function of delay change. The delay may be adjusted based on detected operating temperature. A calibration value may be determined at a calibration frequency, in which a frequency offset may be determined based on a selected channel frequency.
-
公开(公告)号：US20230099832A1
公开(公告)日：2023-03-30
申请号：US17490255
申请日：2021-09-30
Applicant: Silicon Laboratories Inc.
Inventor： Euisoo Yoo , Arup Mukherji , Rangakrishnan Srinivasan , Vitor Pereira , Zhongda Wang , Sriharsha Vasadi
Abstract: In one embodiment, an integrated circuit includes: a first radio frequency (RF) circuit configured to receive and process a first RF signal having a sub-gigahertz (GHz) frequency to output a first lower frequency signal and to transmit RF signals having the sub-GHz frequency; a second RF circuit configured to receive and process a second RF signal having a frequency of at least substantially 2.4 GHz to output a second lower frequency signal and to transmit RF signals at the at least substantially 2.4 GHz; shared analog circuitry coupled to the first RF circuit and the second RF circuit, the shared analog circuitry to receive at least one of the first RF signal or the second RF signal and output a digital output signal; and a digital circuit coupled to the shared analog circuit, the digital circuit to recover message information from the digital output signal.
-
公开(公告)号：US20230006621A1
公开(公告)日：2023-01-05
申请号：US17363049
申请日：2021-06-30
Applicant: Silicon Laboratories Inc.
Inventor： Ruifeng Sun , Sherry Wu , Michael S. Johnson , Vitor Pereira
Abstract: In one embodiment, a dual-mode power amplifier that can operate in different modes includes: a first pair of metal oxide semiconductor field effect transistors (MOSFETs) to receive and pass a constant envelope signal; a second pair of MOSFETs to receive and pass a variable envelope signal, where first terminals of the first pair of MOSFETs are coupled to first terminals of the second pair of MOSFETs, and second terminals of the first pair of MOSFETs are coupled to. second terminals of the second pair of MOSFETs; and a shared MOSFET stack coupled to the first pair of MOSFETs and the second pair of MOSFETs.
-
-
-
-
-
-
-
-
-
Search Results
34
records
(took 0.019 seconds)
