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11.
公开(公告)号:US11126216B2
公开(公告)日:2021-09-21
申请号:US17006309
申请日:2020-08-28
申请人: SK hynix Inc.
发明人: Seung Wook Oh , Young Hoon Kim
摘要: A signal driver includes a first driver, a second driver, an on-timing control circuit, and an off-timing control circuit. The first driver is configured to generate a first driving pulse signal by inverting and driving an input pulse signal. The second driver is configured to generate a second driving pulse signal by inverting and driving the first driving pulse signal. The on-timing control circuit is configured to pull-up drive or pull-down drive the first driving pulse signal based on a first on-timing control signal, a second on-timing control signal, and the input pulse signal. The off-timing control circuit is configured to pull-up drive or pull-down drive the second driving pulse signal based on a first off-timing control signal, a second off-timing control signal, and the first driving pulse signal.
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公开(公告)号:US10658020B2
公开(公告)日:2020-05-19
申请号:US15982741
申请日:2018-05-17
申请人: SK hynix Inc.
发明人: Seung Wook Oh , Hyun Seung Kim
IPC分类号: G11C7/22 , G11C7/24 , G11C7/10 , G11C11/4093
摘要: A strobe signal generation circuit includes a trigger circuit configured to generate a pull-up signal and a pull-down signal according to a clock signal; a first main driver configured to generate a differential data strobe signal in response to receiving the pull-up signal and the pull-down signal; and a second main driver configured to generate an other differential data strobe signal in response to receiving the pull-up signal and the pull-down signal from among the at least one pull-down signal through opposite terminals than the first main driver received the pull-up signal and the pull-down signal.
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公开(公告)号:US10089040B2
公开(公告)日:2018-10-02
申请号:US15261143
申请日:2016-09-09
申请人: SK hynix Inc.
发明人: Seung Wook Oh , Hyun Seung Kim , Jin Youp Cha
IPC分类号: G06F3/06
摘要: A memory apparatus may include a plurality of ranks commonly coupled to an input/output (I/O) terminal. Non-target ranks other than a target rank among the plurality of ranks may be configured to perform an on die termination operation based on a read operation of the target rank.
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公开(公告)号:US09390776B1
公开(公告)日:2016-07-12
申请号:US14626464
申请日:2015-02-19
申请人: SK hynix Inc.
发明人: Seung Wook Oh , Jae Il Kim
CPC分类号: G11C8/18 , G11C7/1066 , G11C7/222 , G11C29/023 , G11C29/028
摘要: A data strobing circuit may include: an operating speed detection unit configured to detect an operating speed of a semiconductor apparatus according to a clock signal, and generate a control signal with a different value depending on the detected operating speed; and a strobe signal generation unit configured to adjust a delay time and pulse width of a read pulse according to the control signal and output an adjusted signal as a strobe signal.
摘要翻译: 数据选通电路可以包括:操作速度检测单元,被配置为根据时钟信号检测半导体装置的操作速度,并根据检测到的操作速度生成具有不同值的控制信号; 以及选通信号生成单元,被配置为根据控制信号调整读取脉冲的延迟时间和脉冲宽度,并输出调整后的信号作为选通信号。
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