公开(公告)号：US11095461B2

公开(公告)日：2021-08-17

申请号：US16346772

申请日：2017-11-03

Applicant: STC.UNM

Inventor： James Plusquellic ,  Wenjie Che

IPC: H04L29/06 ,  H04L9/32 ,  G06F21/44 ,  G09C1/00 ,  G06F17/10

Abstract: The Distribution Effect is proposed for the HELP PUF that is based on purposely introducing biases in the mean and range parameters of path delay distributions to enhance entropy. The biased distributions are then used in the bitstring construction process to introduce differences in the bit values associated with path delays that would normally remain fixed. Offsets are computed to fine tune a token's digitized path delays as a means of maximizing entropy and reproducibility in the generated bitstrings: a first population-based offset method computes median values using data from multiple tokens (i.e., the population) and a second chip-specific technique is proposed which fine tunes path delays using enrollment data from the authenticating token.

公开(公告)号：US10366253B2

公开(公告)日：2019-07-30

申请号：US15534116

申请日：2015-12-15

Applicant: STC.UNM

Inventor： James Plusquellic

IPC: G06F21/73 ,  G06F21/70 ,  G06F21/60 ,  G06F21/71 ,  G09C1/00 ,  H04L9/32 ,  G06F17/18

Abstract: A Hardware-Embedded Delay Physical Unclonable Function (“HELP PUF”) leverages entropy by monitoring path stability and measuring path delays from core logic macros. Reliability and security enhancing techniques for the HELP PUF reduce bit flip errors during regeneration of the bitstring across environmental variations and improve cryptographic strength along with the corresponding difficulty of carrying out model building attacks. A voltage-based enrollment process screens unstable paths on normally synthesized (glitchy) functional units and reduces bit flip errors by carrying out enrollment at multiple supply voltages controlled using on-chip voltage regulators.

公开(公告)号：US10671350B2

公开(公告)日：2020-06-02

申请号：US16051427

申请日：2018-07-31

Applicant: STC.UNM

Inventor： James Plusquellic

IPC: G06F7/58 ,  G09C1/00 ,  H04L9/00 ,  H04L9/08

Abstract: This disclosure describes techniques for analyzing statistical quality of bitstrings produced by a physical unclonable function (PUF). The PUF leverages resistance variations in the power grid wires of an integrated circuit. Temperature and voltage stability of the bitstrings are analyzed. The disclosure also describes converting a voltage drop into a digital code, wherein the conversion is resilient to simple and differential side-channel attacks.

公开(公告)号：US10666256B2

公开(公告)日：2020-05-26

申请号：US16185921

申请日：2018-11-09

Applicant: STC.UNM

Inventor： James Plusquellic ,  James Aarestad

IPC: H03K19/003 ,  H03K19/21 ,  H03K3/84 ,  H03K23/00 ,  H04L9/06 ,  H04L9/08

Abstract: A Hardware-Embedded Delay PUF (HELP) leverages entropy by monitoring path stability and measuring path delays from core logic macros. HELP incorporates techniques to deal with bias. A unique feature of HELP is that it may compare data measured from different test structures. HELP may be implemented in existing FPGA platforms. HELP may leverage both path stability and within-die variations as sources of entropy.

公开(公告)号：US10230369B2

公开(公告)日：2019-03-12

申请号：US14913454

申请日：2014-08-28

Applicant: STC.UNM

Inventor： James Plusquellic ,  James Aarestad

IPC: H05B33/08 ,  H03K19/003 ,  H03K19/21 ,  H03K3/84 ,  H03K23/00

Abstract: A Hardware-Embedded Delay PUF (HELP) leverages entropy by monitoring path stability and measuring path delays from core logic macros. HELP incorporates techniques to deal with bias. A unique feature of HELP is that it may compare data measured from different test structures. HELP may be implemented in existing FPGA platforms. HELP may leverage both path stability and within-die variations as sources of entropy.

公开(公告)号：US20160204781A1

公开(公告)日：2016-07-14

申请号：US14913454

申请日：2014-08-28

Applicant: STC.UNM

Inventor： James Plusquellic ,  James Aarestad

IPC: H03K19/003 ,  H03K19/21

CPC classification number: H03K19/00323 ,  H03K3/84 ,  H03K19/00315 ,  H03K19/215 ,  H03K23/004 ,  H04L9/0662 ,  H04L9/0866

Abstract: A Hardware-Embedded Delay PUF (HELP) leverages entropy by monitoring path stability and measuring path delays from core logic macros. HELP incorporates techniques to deal with bias. A unique feature of HELP is that it may compare data measured from different test structures. HELP may be implemented in existing FPGA platforms. HELP may leverage both path stability and within-die variations as sources of entropy.

Abstract translation: 硬件嵌入延迟PUF（HELP）通过监视路径稳定性和测量核心逻辑宏的路径延迟来利用熵。 帮助包含处理偏见的技术。 HELP的一个独特之处在于可以比较不同测试结构测量的数据。 HELP可以在现有的FPGA平台上实现。 帮助可以利用路径稳定性和模内变化作为熵的来源。