公开(公告)号：US11575254B2

公开(公告)日：2023-02-07

申请号：US17095652

申请日：2020-11-11

Applicant: STMicroelectronics International N.V. ,  STMicroelectronics (Rousset) SAS

Inventor： Manoj Kumar ,  Ravinder Kumar ,  Nicolas Demange

IPC: H02H3/20 ,  H02H1/00

Abstract: An integrated circuit includes an overvoltage protection circuit. The overvoltage protection circuit detects overvoltage events at a pad of the integrated circuit. The overvoltage protection circuit generates a max voltage signal that is the greater of the voltage at the pad and a supply voltage of the integrated circuit. The overvoltage protection circuit disables a PMOS transistor coupled to the pad by supplying the max voltage signal to the gate of the PMOS transistor when an overvoltage event is present at the pad.

公开(公告)号：US11550749B2

公开(公告)日：2023-01-10

申请号：US17143679

申请日：2021-01-07

Applicant: STMicroelectronics International N.V. ,  STMicroelectronics (Rousset) SAS

Inventor： Manoj Kumar ,  Kailash Kumar ,  Nicolas Demange

IPC: G06F13/42 ,  G06F1/06

Abstract: A serial peripheral interface (SPI) device includes a serial clock (SCK) pad receiving a serial clock, first and second Schmitt triggers directly electrically connected to the SCK pad to selectively respectively generate first and second clocks in response to rising and falling edges of the serial clock, first and second flip flops clocked by the first and second clocks to output bits of data to a data node, a multiplexer having an input coupled to the data node and an output coupled to driving circuitry, and driving circuitry transmitting data via a master-in-slave-out (MISO) pad.

公开(公告)号：US11088536B2

公开(公告)日：2021-08-10

申请号：US16690644

申请日：2019-11-21

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Nicolas Demange

IPC: H02H9/00 ,  H02H7/00 ,  H02H7/125 ,  G06K19/07 ,  G06K19/077 ,  H02H9/04 ,  H01L27/02 ,  H02H7/20

Abstract: An integrated circuit includes a voltage regulating circuit in the form of only one transistor, or a group of several transistors in parallel, that are connected between first and second terminals configured to be coupled to an antenna. A control circuit operates to make the voltage regulating circuit inactive when a pulse generated by an electrostatic discharge event appears at one of the first and second terminals, regardless of the direction of flow of the pulse between the first and second terminals. An electrostatic discharge circuit is further provided to address the electrostatic discharge event.

公开(公告)号：US20210181778A1

公开(公告)日：2021-06-17

申请号：US17119788

申请日：2020-12-11

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Jimmy Fort ,  Nicolas Demange

IPC: G05F3/26 ,  G05F1/46

Abstract: An embodiment method for smoothing consumed current is based on a current copying suite and on a current source supplying a reference current, the currents being transformed into a reference voltage for the regulation of a voltage regulator such that the consumed current viewed by the power supply only depends on the reference current.

公开(公告)号：US11768512B2

公开(公告)日：2023-09-26

申请号：US17119788

申请日：2020-12-11

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Jimmy Fort ,  Nicolas Demange

IPC: G05F3/26 ,  G05F1/46

CPC classification number: G05F3/262 ,  G05F1/461

Abstract: An embodiment method for smoothing consumed current is based on a current copying suite and on a current source supplying a reference current, the currents being transformed into a reference voltage for the regulation of a voltage regulator such that the consumed current viewed by the power supply only depends on the reference current.

公开(公告)号：US11698651B2

公开(公告)日：2023-07-11

申请号：US17399674

申请日：2021-08-11

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Nicolas Demange ,  Nicolas Borrel ,  Jimmy Fort

IPC: G05F1/56 ,  G06F21/75

CPC classification number: G05F1/56 ,  G06F21/755

Abstract: The present invention concerns an electronic circuit power supply device, configured to: flow, through a first conductor connected to a node, a first current that is an image of a second current consumed by the electronic circuit; flow a third current through a second conductor connected to the node, a first branch of a current mirror conducting the third current; flow a fourth constant current through a third conductor connected to the node; consume a fifth current that is an image of the third current; and regulate a potential of the node by acting on a gate potential of a transistor electrically in series with a second branch of the current mirror.

公开(公告)号：US20200091705A1

公开(公告)日：2020-03-19

申请号：US16690644

申请日：2019-11-21

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Nicolas Demange

IPC: H02H7/125 ,  G06K19/07 ,  G06K19/077 ,  H02H9/04 ,  H01L27/02 ,  H02H7/20

Abstract: An integrated circuit includes a voltage regulating circuit in the form of only one transistor, or a group of several transistors in parallel, that are connected between first and second terminals configured to be coupled to an antenna. A control circuit operates to make the voltage regulating circuit inactive when a pulse generated by an electrostatic discharge event appears at one of the first and second terminals, regardless of the direction of flow of the pulse between the first and second terminals. An electrostatic discharge circuit is further provided to address the electrostatic discharge event.

公开(公告)号：US09678525B2

公开(公告)日：2017-06-13

申请号：US15150713

申请日：2016-05-10

Applicant: STMICROELECTRONICS (ROUSSET) SAS

Inventor： Nicolas Demange ,  Jimmy Fort ,  Thierry Soude

IPC: G05F3/26 ,  H01L23/00 ,  H03B29/00

CPC classification number: G05F3/262 ,  G06F21/755 ,  G06K19/0723 ,  H01L23/576 ,  H03B29/00

Abstract: A method for smoothing current consumed by an electronic device is based on a series of current copying operations and on a current source delivering a reference current. The reference current is delivered in such a manner that current consumed as seen from the power supply depends on the reference current.