公开(公告)号：US20190181076A1

公开(公告)日：2019-06-13

申请号：US16213540

申请日：2018-12-07

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Dario VITELLO ,  Fabio MARCHISI ,  Alberto ARRIGONI ,  Federico FREGO ,  Federico Giovanni ZIGLIOLI ,  Paolo CREMA

IPC: H01L23/495 ,  H01L21/48 ,  B26F1/38 ,  B23C3/13 ,  C23F1/02

Abstract: A method of producing leadframes for semiconductor devices comprises: providing a plurality of electrically-conductive plates, forming in the electrically conductive plates homologous passageway patterns according to a desired semiconductor device leadframe pattern, joining together the plurality of plates with the homologous passageway patterns formed therein mutually in register by producing a multilayered leadframe exhibiting the desired leadframe pattern and a thickness which is the sum of the thicknesses of the plates in the plurality of electrically-conductive plates.

公开(公告)号：US20180284299A1

公开(公告)日：2018-10-04

申请号：US15939096

申请日：2018-03-28

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Paolo CREMA ,  Alessandro FREGUGLIA ,  Piero FALLICA

IPC: G01T1/208 ,  G01T1/20 ,  G01T1/202 ,  H01L31/0203

CPC classification number: G01T1/208 ,  G01T1/2002 ,  G01T1/2018 ,  G01T1/202 ,  G01T7/00 ,  H01L31/0203 ,  H01L31/02322 ,  H01L31/085 ,  H01L31/107

Abstract: A radiation scintillator detector comprising a substrate on which are arranged a scintillator module and a silicon photomultiplier optically coupled one to the other. The detector includes a package comprising an outer casing enclosing said scintillator module and said photomultiplier, said package comprising inside said outer casing an inner casing comprising resin reflecting photons, in particular infrared and/or visible photons, emitted by said scintillator module upon receiving a ionizing radiation, enclosing said scintillator module and said photomultiplier.

公开(公告)号：US20240395680A1

公开(公告)日：2024-11-28

申请号：US18797031

申请日：2024-08-07

Applicant: STMicroelectronics S.r.l.

Inventor： Paolo CREMA

IPC: H01L23/495 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31

Abstract: A substrate of a lead frame is made of a first material. The substrate is covered by a barrier film made of a second material, different from the first material. The barrier film is then covered by a further film made of the first material. A first portion of the lead frame is encapsulated within an encapsulating body in a way which leaves a second portion of lead frame extending out from and not being covered by the encapsulating body. A first portion of the further film which is not covered by the encapsulating body is then stripped away to expose the barrier film at the second portion of the lead frame. A second portion of the further film is left remaining encapsulated by the encapsulating body. The exposed barrier film at the second portion of the lead frame is then covered with a tin or tin-based layer.

公开(公告)号：US20240249955A1

公开(公告)日：2024-07-25

申请号：US18624589

申请日：2024-04-02

Applicant: STMicroelectronics S.r.l.

Inventor： Paolo CREMA

IPC: H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/495

CPC classification number: H01L21/4842 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/49503 ,  H01L23/49575

Abstract: An multi-die semiconductor device disclosed herein includes a metallic leadframe with a central die pad encircled by electrically-conductive leads. Mounted on the die pad are two semiconductor dice, each with dedicated bonding pads on the surfaces facing away from the die pad. A layer of laser-activatable material is precisely molded over the dice and the leadframe. This layer forms a network of laser-activated lines: the first subset establishes electrical connections between the dice bonding pads and the leadframe leads, while the second subset interconnects the bonding pads of the first die to those of the second. There are two distinct metallic layers; the lower one, directly on the laser-activated lines, is formed of electroless-plated material, and the upper one, enhancing the structure, is formed of electroplated material, thus providing robust and reliable interconnections within the device.

公开(公告)号：US20230215819A1

公开(公告)日：2023-07-06

申请号：US18121145

申请日：2023-03-14

Applicant: STMicroelectronics S.r.l.

Inventor： Paolo CREMA

IPC: B23K26/354 ,  H01L23/495 ,  B23K26/0622

CPC classification number: B23K26/354 ,  H01L23/49582 ,  H01L23/49503 ,  B23K26/0622 ,  B23K2103/08

Abstract: A leadframe has a die pad area and an outer layer of a first metal having a first oxidation potential. The leadframe is placed in contact with a solution containing a second metal having a second oxidation potential, the second oxidation potential being more negative than the first oxidation potential. Radiation energy is then applied to the die pad area of the leadframe contacted with the solution to cause a local increase in temperature of the leadframe. As a result of the temperature increase, a layer of said second metal is selectively provided at the die pad area of the leadframe by a galvanic displacement reaction. An oxidation of the outer layer of the leadframe is then performed to provide an enhancing layer which counters device package delamination.

公开(公告)号：US20230096480A1

公开(公告)日：2023-03-30

申请号：US17488056

申请日：2021-09-28

Applicant: STMicroelectronics S.r.l.

Inventor： Paolo CREMA

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56

Abstract: A substrate of a lead frame is made of a first material. The substrate is covered by a barrier film made of a second material, different from the first material. The barrier film is then covered by a further film made of the first material. A first portion of the lead frame is encapsulated within an encapsulating body in a way which leaves a second portion of lead frame extending out from and not being covered by the encapsulating body. A first portion of the further film which is not covered by the encapsulating body is then stripped away to expose the barrier film at the second portion of the lead frame. A second portion of the further film is left remaining encapsulated by the encapsulating body. The exposed barrier film at the second portion of the lead frame is then covered with a tin or tin-based layer.

公开(公告)号：US20230002924A1

公开(公告)日：2023-01-05

申请号：US17363205

申请日：2021-06-30

Applicant: STMicroelectronics S.r.l.

Inventor： Paolo CREMA

IPC: C25D3/38 ,  C22C9/02

Abstract: A uniform copper-tin compound layer is electrochemically deposited on a surface of a copper-based base structure. A tin-based film is then formed on the copper-tin compound layer. The uniform copper-tin compound layer provides a barrier that effectively inhibits tin whisker growth.

公开(公告)号：US20210167022A1

公开(公告)日：2021-06-03

申请号：US17108187

申请日：2020-12-01

Applicant: STMicroelectronics S.r.l.

Inventor： Paolo CREMA

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/495 ,  H01L21/48 ,  H01L21/56

Abstract: A leadframe has a die pad area and an outer layer of a first metal having a first oxidation potential. The leadframe is placed in contact with a solution containing a second metal having a second oxidation potential, the second oxidation potential being more negative than the first oxidation potential. Radiation energy is then applied to the die pad area of the leadframe contacted with the solution to cause a local increase in temperature of the leadframe. As a result of the temperature increase, a layer of said second metal is selectively provided at the die pad area of the leadframe by a galvanic displacement reaction. An oxidation of the outer layer of the leadframe is then performed to provide an enhancing layer which counters device package delamination.

公开(公告)号：US20190295934A1

公开(公告)日：2019-09-26

申请号：US15934783

申请日：2018-03-23

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Paolo CREMA

IPC: H01L23/495 ,  H01L23/00 ,  H01L21/48

Abstract: The present disclosure is directed to a leadframe package with a surface mounted semiconductor die coupled to leads of the leadframe package through wire bonding. The leads are partially exposed outside the package and configured to couple to another structure, like a printed circuit board (PCB). The exposed portions, namely outer segments, of the leads include a plating or coating layer of a material that enhances the solder wettability of the leads to the PCB through solder bonding. The enclosed portions, namely inner segments, of the leads do not include the plating layer of the outer segment and, thus, include a different surface material or surface finish.