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公开(公告)号:US10656331B2
公开(公告)日:2020-05-19
申请号:US16156601
申请日:2018-10-10
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Frederic Boeuf , Charles Baudot
Abstract: A three-dimensional photonic integrated structure includes a first semiconductor substrate and a second semiconductor substrate. The first substrate incorporates a first waveguide and the second semiconductor substrate incorporates a second waveguide. An intermediate region located between the two substrates is formed by a one dielectric layer. The second substrate further includes an optical coupler configured for receiving a light signal. The first substrate and dielectric layer form a reflective element located below and opposite the grating coupler in order to reflect at least one part of the light signal.
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公开(公告)号:US20190049664A1
公开(公告)日:2019-02-14
申请号:US16156601
申请日:2018-10-10
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Frederic Boeuf , Charles Baudot
Abstract: A three-dimensional photonic integrated structure includes a first semiconductor substrate and a second semiconductor substrate. The first substrate incorporates a first waveguide and the second semiconductor substrate incorporates a second waveguide. An intermediate region located between the two substrates is formed by a one dielectric layer. The second substrate further includes an optical coupler configured for receiving a light signal. The first substrate and dielectric layer form a reflective element located below and opposite the grating coupler in order to reflect at least one part of the light signal.
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公开(公告)号:US20170213910A1
公开(公告)日:2017-07-27
申请号:US15483299
申请日:2017-04-10
Applicant: STMicroelectronics (Crolles 2) SAS , Commissariat A L'Energie Atomique et aux Energies Alternatives
Inventor: Frederic Boeuf , Olivier Weber
IPC: H01L29/78 , H01L29/16 , H01L21/8238 , H01L27/092 , H01L21/02 , H01L21/762 , H01L29/06 , H01L29/161
CPC classification number: H01L29/7847 , H01L21/02381 , H01L21/02422 , H01L21/02532 , H01L21/02639 , H01L21/02667 , H01L21/76264 , H01L21/76283 , H01L21/823807 , H01L21/84 , H01L27/092 , H01L27/12 , H01L27/1203 , H01L29/0611 , H01L29/0642 , H01L29/16 , H01L29/161 , H01L29/7838
Abstract: A substrate of the silicon on insulator type includes a semi-conducting film disposed on a buried insulating layer which is disposed on an unstressed silicon support substrate. The semi-conducting film includes a first film zone of tensile-stressed silicon and a second film zone of tensile-relaxed silicon. Openings through the buried insulating layer permit access to the unstressed silicon support substrate under the first and second film zones. An N channel transistor is formed from the first film zone and a P channel transistor is formed from the second film zone. The second film zone may comprise germanium enriched silicon forming a compressive-stressed region.
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公开(公告)号:US11709315B2
公开(公告)日:2023-07-25
申请号:US17540626
申请日:2021-12-02
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Frederic Boeuf , Charles Baudot
CPC classification number: G02B6/12002 , G02B6/122 , G02B6/124 , G02B6/12004 , G02B6/126 , G02B6/2773 , G02B6/30 , G02B6/34 , G02B6/4204 , G02B2006/12104 , G02B2006/12107 , G02B2006/12116 , G02B2006/12147
Abstract: A three-dimensional photonic integrated structure includes a first semiconductor substrate and a second semiconductor substrate. The first substrate incorporates a first waveguide and the second semiconductor substrate incorporates a second waveguide. An intermediate region located between the two substrates is formed by a one dielectric layer. The second substrate further includes an optical coupler configured for receiving a light signal. The first substrate and dielectric layer form a reflective element located below and opposite the grating coupler in order to reflect at least one part of the light signal.
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公开(公告)号:US11231548B2
公开(公告)日:2022-01-25
申请号:US16847189
申请日:2020-04-13
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Frederic Boeuf , Charles Baudot
Abstract: A three-dimensional photonic integrated structure includes a first semiconductor substrate and a second semiconductor substrate. The first substrate incorporates a first waveguide and the second semiconductor substrate incorporates a second waveguide. An intermediate region located between the two substrates is formed by a one dielectric layer. The second substrate further includes an optical coupler configured for receiving a light signal. The first substrate and dielectric layer form a reflective element located below and opposite the grating coupler in order to reflect at least one part of the light signal.
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公开(公告)号:US11165220B2
公开(公告)日:2021-11-02
申请号:US16757308
申请日:2017-10-19
Applicant: CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE , STMicroelectronics (Crolles 2) SAS , Universite Paris-Saclay
Inventor: Anas Elbaz , Moustafa El Kurdi , Abdelhanin Aassime , Philippe Boucaud , Frederic Boeuf
Abstract: A structure includes a semiconductor support, a semiconductor region overlying the semiconductor support, a silicon nitride layer surrounding and straining the semiconductor region, and a metal foot separating the silicon nitride layer from the semiconductor support. The semiconductor region includes germanium. The semiconductor region can be a resonator of a laser or a waveguide.
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公开(公告)号:US10686297B2
公开(公告)日:2020-06-16
申请号:US15555639
申请日:2015-03-06
Applicant: STMicroelectronics (Crolles 2) SAS , Centre National de la Recherche Scientifique , Universite Paris SUD
Inventor: Mathias Prost , Moustafa El Kurdi , Philippe Boucaud , Frederic Boeuf
IPC: H01S5/10 , G02B6/12 , H01S5/32 , H01S5/02 , H01S5/042 , H01S5/227 , H01S5/30 , G02B6/136 , G02B6/10
Abstract: A germanium waveguide is formed from a P-type silicon substrate that is coated with a heavily-doped N-type germanium layer and a first N-type doped silicon layer. Trenches are etched into the silicon substrate to form a stack of a substrate strip, a germanium strip, and a first silicon strip. This structure is then coated with a silicon nitride layer.
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公开(公告)号:US10381478B2
公开(公告)日:2019-08-13
申请号:US15483299
申请日:2017-04-10
Applicant: STMicroelectronics (Crolles 2) SAS , Commissariat A L'Energie Atomique et aux Energies Alternatives
Inventor: Frederic Boeuf , Olivier Weber
IPC: H01L23/48 , H01L29/04 , H01L29/78 , H01L21/02 , H01L21/84 , H01L27/12 , H01L29/06 , H01L21/762 , H01L21/8238 , H01L27/092 , H01L29/16 , H01L29/161
Abstract: A substrate of the silicon on insulator type includes a semi-conducting film disposed on a buried insulating layer which is disposed on an unstressed silicon support substrate. The semi-conducting film includes a first film zone of tensile-stressed silicon and a second film zone of tensile-relaxed silicon. Openings through the buried insulating layer permit access to the unstressed silicon support substrate under the first and second film zones. An N channel transistor is formed from the first film zone and a P channel transistor is formed from the second film zone. The second film zone may comprise germanium enriched silicon forming a compressive-stressed region.
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公开(公告)号:US10359652B2
公开(公告)日:2019-07-23
申请号:US15868642
申请日:2018-01-11
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Charles Baudot , Maurin Douix , Frederic Boeuf , Sébastien Cremer
Abstract: An E/O phase modulator may include a waveguide having an insulating substrate, a single-crystal silicon strip and a polysilicon strip of a same thickness and doped with opposite conductivity types above the insulating substrate, and an insulating interface layer between the single-crystal silicon strip and polysilicon strip. Each of the single-crystal silicon strip and polysilicon strip may be laterally continued by a respective extension, and a respective electrical contact coupled to each extension.
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公开(公告)号:US20180048123A1
公开(公告)日:2018-02-15
申请号:US15555639
申请日:2015-03-06
Applicant: STMicroelectronics (Crolles 2) SAS , Centre National de la Recherche Scientifique , Universite Paris SUD
Inventor: Mathias Prost , Moustafa El Kurdi , Philippe Boucaud , Frederic Boeuf
Abstract: A germanium waveguide is formed from a P-type silicon substrate that is coated with a heavily-doped N-type germanium layer and a first N-type doped silicon layer. Trenches are etched into the silicon substrate to form a stack of a substrate strip, a germanium strip, and a first silicon strip. This structure is then coated with a silicon nitride layer.
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