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公开(公告)号:US20210249954A1
公开(公告)日:2021-08-12
申请号:US17242955
申请日:2021-04-28
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor: David Chesneau , Francois Amiard , Helene Esch
Abstract: A method for increasing performance of a voltage-buck switched-mode voltage regulator includes generating a first pulse-width modulation signal based on a clock signal, decreasing a frequency of the clock signal to form a modified clock signal, passing the modified clock signal to a digital modulation circuit as a regulated clock signal; and generating a second pulse-width modulation signal based on the regulated clock signal using the digital modulation circuit. The first pulse-width modulation signal includes a period T1 and an off duration D2 corresponding to a first duty cycle. The off duration D2 is an intrinsic pulse-width modulation signal generation latency. The second pulse-width modulation signal includes a period T2 and the off duration D2. The decreased frequency of the modified clock signal causes T2 to be greater than T1 such that a second duty cycle of the second pulse-width modulation signal is increased relative to the first duty cycle.
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公开(公告)号:US20210126536A1
公开(公告)日:2021-04-29
申请号:US17078317
申请日:2020-10-23
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor: Helene Esch , David Chesneau
IPC: H02M3/158 , H02M3/335 , G05F3/24 , G05F1/56 , H03K17/082 , H03K17/687 , H03K19/00
Abstract: In an embodiment, a voltage comparator includes: a first switch having a conduction terminal coupled to an internal node that is coupled to an output of the voltage comparator; a current source; a capacitor; and a second switch connected in parallel with the capacitor, wherein the current source, the capacitor, and the first switch are coupled in series.
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公开(公告)号:US20200099296A1
公开(公告)日:2020-03-26
申请号:US16570660
申请日:2019-09-13
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor: David Chesneau , Francois Amiard , Helene Esch
Abstract: A method can be used for regulating a pulse-width modulation signal that is driving a voltage-buck switched-mode voltage regulator. The method includes comparing an input voltage of the switched-mode voltage regulator with a threshold voltage. The frequency of the pulse-width modulation signal is decreased when the input voltage is lower than the threshold voltage. The frequency is not decreased when the input voltage is not lower than the threshold voltage.
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