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公开(公告)号：US11703897B2
公开(公告)日：2023-07-18
申请号：US16810639
申请日：2020-03-05
Inventor： Michel Cuenca , Bruno Gailhard , Daniele Mangano
IPC: G05F1/56
CPC classification number: G05F1/56
Abstract: In an embodiment, a method includes: receiving a main supply voltage; generating a first regulated output voltage with a DC-DC converter; providing the main supply voltage to a driver of a control terminal of an output transistor of an LDO; receiving, at an input terminal of the LDO, the first regulated output voltage; generating, at an output terminal of the LDO, a second regulated output voltage from the first regulated output voltage; and when the main supply voltage falls below a predetermined threshold, discharging a capacitor coupled to the input terminal of the LDO by activating a switch coupled to the input terminal of the LDO.
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公开(公告)号：US20220163408A1
公开(公告)日：2022-05-26
申请号：US17452224
申请日：2021-10-25
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Vincent Binet , Bruno Gailhard
Abstract: A calibration method of a temperature sensor is provided. The temperature sensor having a current source and a ring oscillator generating a square pulse signal with a temperature-dependent square pulse frequency. The acquisition of a first square pulse frequency measurement at a first temperature from the square pulse signal forms a first measurement point. A second square pulse frequency measurement at a second temperature from the second square pulse signal forms a second measurement point. The determination of the relation data being representative of an affine relation between square pulse frequency measurements and temperatures. The affine relation being defined by a used proportionality coefficient modified with respect to a measured proportionality coefficient of a measured affine relation linking the first measurement point and the second measurement point.
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13.发明授权公开(公告)号：US11245405B2
公开(公告)日：2022-02-08
申请号：US17352849
申请日：2021-06-21
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Bruno Gailhard , Laurent Truphemus , Christophe Eva
Abstract: A start-up phase of a phase lock loop (PLL) circuit includes supplying, by a phase comparator, of control pulses during which an output signal frequency of an oscillator increases. The increase includes an application of a pre-charge current at the oscillator input. A determination is made of a time variation of the output signal frequency. At least one adjustment is made of the intensity of the pre-charge current depending on the at least one determined time variation so as to approach a reference time variation.
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14.发明授权公开(公告)号：US09654095B2
公开(公告)日：2017-05-16
申请号：US14536122
申请日：2014-11-07
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Bruno Gailhard , Michel Cuenca
IPC: H03K17/16 , H03K17/687 , H03K3/012 , G11C27/02
CPC classification number: H03K17/161 , G11C27/024 , H03K3/012 , H03K17/6872
Abstract: A method is used to control an electronic device that includes a switching unit having a main MOS transistor having a substrate, a first conducting electrode and a second conducting electrode coupled to an output terminal. The method includes controlling the main transistor in such a way as to put it into an on state or an off state such that, when the main transistor is in the on state, the substrate and the first conducting electrode of the main transistor are connected to an input terminal and, when the main transistor is in the off state, the first conducting electrode of the main transistor is isolated from the input terminal and a first bias voltage is applied to the first conducting electrode and a second bias voltage is applied to the substrate of the main transistor.
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15.发明授权Method and device for managing the time transition of a CMOS logic circuit as a function of temperature 有权用于管理作为温度的函数的CMOS逻辑电路的时间转换的方法和装置公开(公告)号：US09325325B2
公开(公告)日：2016-04-26
申请号：US14502095
申请日：2014-09-30
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Bruno Gailhard , Michel Cuenca
IPC: H03L1/02 , H03K19/0948 , H03B5/04 , H03K19/003 , G05F3/26 , G11C7/04
CPC classification number: H03L1/026 , G05F3/262 , G11C7/04 , H03B5/04 , H03K19/00323 , H03K19/00369 , H03K19/0948
Abstract: A method includes generation of a first current proportional to absolute temperature and formation of a second current representative of the temperature variation of the threshold voltages of the transistors of the inverter and limited to a fraction of the first current. This fraction is less than one. The inverter is supplied with a supply current equal to the first current minus the limited second current.
Abstract translation: 一种方法包括产生与绝对温度成比例的第一电流和形成表示逆变器的晶体管的阈值电压的温度变化的第二电流，并将其限制为第一电流的一部分。 这个比例小于1。 逆变器的供电电流等于第一电流减去受限的第二电流。
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Patent Agency Ranking
公开(公告)号：US11671078B2
公开(公告)日：2023-06-06
申请号：US17520063
申请日：2021-11-05
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Bruno Gailhard
CPC classification number: H03K3/0315 , G06F1/06 , G06F1/08 , H03K5/00006 , H03K5/26 , H03L7/093 , H03L7/0995
Abstract: A device for generating first clock signals includes first circuits, each including a ring oscillator delivering one of the first clock signals and being connected to a first node configured to receive a first current. A circuit selects one the first clock signals, and a phase-locked loop delivers a second signal which is a function of a difference between a frequency of the first selected clock signal and a set point frequency. Each first circuit supplies the first node with a compensation current determined by the second signal, when this first circuit delivers the selected clock signal and operates in controlled mode.
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公开(公告)号：US20230019539A1
公开(公告)日：2023-01-19
申请号：US17947461
申请日：2022-09-19
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Bruno Gailhard
Abstract: Two sets of the DC voltages are determined from among sets of DC voltages. At a first temperature, a first voltage of one of the two sets and a first voltage of the other one of the two sets surround a detection voltage that varies substantially proportionally to temperature. The detection voltage is compared with a second voltage of one of the two sets.
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公开(公告)号：US11454554B2
公开(公告)日：2022-09-27
申请号：US16576377
申请日：2019-09-19
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Bruno Gailhard
Abstract: Two sets of the DC voltages are determined from among sets of DC voltages. At a first temperature, a first voltage of one of the two sets and a first voltage of the other one of the two sets surround a detection voltage that varies substantially proportionally to temperature. The detection voltage is compared with a second voltage of one of the two sets.
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公开(公告)号：US20210278868A1
公开(公告)日：2021-09-09
申请号：US16810639
申请日：2020-03-05
Inventor： Michel Cuenca , Bruno Gailhard , Daniele Mangano
IPC: G05F1/56
Abstract: In an embodiment, a method includes: receiving a main supply voltage; generating a first regulated output voltage with a DC-DC converter; providing the main supply voltage to a driver of a control terminal of an output transistor of an LDO; receiving, at an input terminal of the LDO, the first regulated output voltage; generating, at an output terminal of the LDO, a second regulated output voltage from the first regulated output voltage; and when the main supply voltage falls below a predetermined threshold, discharging a capacitor coupled to the input terminal of the LDO by activating a switch coupled to the input terminal of the LDO.
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20.发明申请公开(公告)号：US20170222639A1
公开(公告)日：2017-08-03
申请号：US15490356
申请日：2017-04-18
Applicant: STMicroelectronics (Rousset) SAS
Inventor： Bruno Gailhard , Michel Cuenca
CPC classification number: H03K17/161 , G11C27/024 , H03K3/012 , H03K17/6872
Abstract: A method is used to control an electronic device that includes a switching unit having a main MOS transistor having a substrate, a first conducting electrode and a second conducting electrode coupled to an output terminal. The method includes controlling the main transistor in such a way as to put it into an on state or an off state such that, when the main transistor is in the on state, the substrate and the first conducting electrode of the main transistor are connected to an input terminal and, when the main transistor is in the off state, the first conducting electrode of the main transistor is isolated from the input terminal and a first bias voltage is applied to the first conducting electrode and a second bias voltage is applied to the substrate of the main transistor.
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