公开(公告)号：US10454466B1

公开(公告)日：2019-10-22

申请号：US16253410

申请日：2019-01-22

Applicant: STMicroelectronics International N.V.

Inventor： Manoj Kumar Kumar Tiwari ,  Saiyid Mohammad Irshad Rizvi

IPC: H03K19/0185 ,  H03K17/082 ,  G05F3/16 ,  H03K17/687

Abstract: An output stage of an output buffer circuit includes a first drive transistor and a first cascode transistor (coupled in series between a first supply node and an output node) and a second drive transistor and a second cascode transistor (coupled in series between the output node and a second supply node). Gates of the first and second cascode transistors are biased with first and second bias voltages, respectively. The first bias voltage equals the first supply voltage at the first supply node when the first supply voltage is less than a threshold, and is fixed at a fixed voltage for any first supply voltage exceeding the threshold voltage. The second bias voltage equals a fixed voltage when the first supply voltage is less than a threshold voltage, and is offset from the first supply voltage by a fixed difference for any first supply voltage exceeding the threshold.

公开(公告)号：US10224922B1

公开(公告)日：2019-03-05

申请号：US15945049

申请日：2018-04-04

Applicant: STMicroelectronics International N.V.

Inventor： Manoj Kumar Kumar Tiwari ,  Saiyid Mohammad Irshad Rizvi

IPC: H03K19/0185 ,  H03K17/082 ,  G05F3/16 ,  H03K17/687

Abstract: An output stage of an output buffer circuit includes a first drive transistor and a first cascode transistor (coupled in series between a first supply node and an output node) and a second drive transistor and a second cascode transistor (coupled in series between the output node and a second supply node). Gates of the first and second cascode transistors are biased with first and second bias voltages, respectively. The first bias voltage equals the first supply voltage at the first supply node when the first supply voltage is less than a threshold, and is fixed at a fixed voltage for any first supply voltage exceeding the threshold voltage. The second bias voltage equals a fixed voltage when the first supply voltage is less than a threshold voltage, and is offset from the first supply voltage by a fixed difference for any first supply voltage exceeding the threshold.

公开(公告)号：US20160094217A1

公开(公告)日：2016-03-31

申请号：US14500076

申请日：2014-09-29

Applicant: STMicroelectronics International N.V.

Inventor： Paras Garg ,  Rajesh Yadav ,  Saiyid Mohammad Irshad Rizvi ,  Ravinder Kumar

IPC: H03K17/687

CPC classification number: H03K17/687 ,  H03K19/0185 ,  H03K2217/0018

Abstract: A drive circuit includes a first drive transistor coupled between a first supply node and an output pad of an integrated circuit and a second drive transistor coupled between a second supply node and the output pad. The first drive transistor and second drive transistors are controlled by a control signal. A body bias generator circuit is configured to apply a variable first body bias to the first transistor and a variable second body bias to the second transistor. The variable first and second body biases are generated as a function of the control signal and a voltage at the output pad.

Abstract translation: 驱动电路包括耦合在集成电路的第一电源节点和输出焊盘之间的第一驱动晶体管，以及耦合在第二电源节点和输出焊盘之间的第二驱动晶体管。 第一驱动晶体管和第二驱动晶体管由控制信号控制。 体偏置发生器电路被配置为将可变第一体偏置施加到第一晶体管，并将可变第二体偏置施加到第二晶体管。 可变的第一和第二体偏置作为控制信号和输出焊盘处的电压的函数产生。