公开(公告)号：US11784049B2

公开(公告)日：2023-10-10

申请号：US17190722

申请日：2021-03-03

Applicant: STMicroelectronics S.r.l.

Inventor： Simone Rascuna' ,  Paolo Badala' ,  Anna Bassi ,  Mario Giuseppe Saggio ,  Giovanni Franco

IPC: H01L21/04 ,  H01L29/16 ,  H01L29/45 ,  H01L29/47

CPC classification number: H01L21/0485 ,  H01L21/0495 ,  H01L29/1608 ,  H01L29/45 ,  H01L29/47

Abstract: A method for manufacturing an electronic device based on SiC includes forming a structural layer of SiC on a front side of a substrate. The substrate has a back side that is opposite to the front side along a direction. Active regions of the electronic device are formed in the structure layer, and the active regions are configured to generate or conduct electric current during the use of the electronic device. A first electric terminal is formed on the structure layer, and an intermediate layer is formed at the back side of the substrate. The intermediate layer is heated by a LASER beam in order to generate local heating such as to favor the formation of an ohmic contact of Titanium compounds. A second electric terminal of the electronic device is formed on the intermediate layer.

公开(公告)号：US11495508B2

公开(公告)日：2022-11-08

申请号：US17039289

申请日：2020-09-30

Applicant: STMicroelectronics S.r.l.

Inventor： Simone Rascuna′ ,  Claudio Chibbaro ,  Alfio Guarnera ,  Mario Giuseppe Saggio ,  Francesco Lizio

IPC: H01L23/31 ,  H01L21/04 ,  H01L21/56 ,  H01L29/16 ,  H01L29/06 ,  H01L29/66

Abstract: An electronic power device includes a substrate of silicon carbide (SiC) having a front surface and a rear surface which lie in a horizontal plane and are opposite to one another along a vertical axis. The substrate includes an active area, provided in which are a number of doped regions, and an edge area, which is not active, distinct from and surrounding the active area. A dielectric region is arranged above the front surface, in at least the edge area. A passivation layer is arranged above the front surface of the substrate, and is in contact with the dielectric region in the edge area. The passivation layer includes at least one anchorage region that extends through the thickness of the dielectric region at the edge area, such as to define a mechanical anchorage for the passivation layer.

公开(公告)号：US11417778B2

公开(公告)日：2022-08-16

申请号：US16825214

申请日：2020-03-20

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Simone Rascuna′ ,  Mario Giuseppe Saggio

IPC: H01L29/45 ,  H01L29/872 ,  H01L29/06 ,  H01L29/16 ,  H01L29/20 ,  H01L29/47 ,  H01L29/66

Abstract: A merged-PN-Schottky, MPS, diode includes an N substrate, an N-drift layer, a P-doped region in the drift layer, an ohmic contact on the P-doped region, a plurality of cells within the P-doped region and being portions of the drift layer where the P-doped region is absent, an anode metallization on the ohmic contact and on said cells, to form junction-barrier contacts and Schottky contacts respectively. The P-doped region has a grid-shaped layout separating from one another each cell and defining, together with the cells, an active area of the MPS diode. Each cell has a same geometry among quadrangular, quadrangular with rounded corners and circular; and the ohmic contact extends at the doped region with continuity along the grid-shaped layout.

公开(公告)号：US11316025B2

公开(公告)日：2022-04-26

申请号：US16882293

申请日：2020-05-22

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Patrick Fiorenza ,  Fabrizio Roccaforte ,  Mario Giuseppe Saggio

IPC: H01L29/16 ,  H01L29/872 ,  H01L27/06 ,  H01L29/423

Abstract: An electronic device comprising: a semiconductor body of silicon carbide, SiC, having a first and a second face, opposite to one another along a first direction, which presents positive-charge carriers at said first face that form a positive interface charge; a first conduction terminal, which extends at the first face of the semiconductor body; a second conduction terminal, which extends on the second face of the semiconductor body; a channel region in the semiconductor body, configured to house, in use, a flow of electrons between the first conduction terminal and the second conduction terminal; and a trapping layer, of insulating material, which extends in electrical contact with the semiconductor body at said channel region and is designed so as to present electron-trapping states that generate a negative charge such as to balance, at least in part, said positive interface charge.

公开(公告)号：US12051731B2

公开(公告)日：2024-07-30

申请号：US17698986

申请日：2022-03-18

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Patrick Fiorenza ,  Fabrizio Roccaforte ,  Mario Giuseppe Saggio

IPC: H01L29/16 ,  H01L27/06 ,  H01L29/423 ,  H01L29/872

CPC classification number: H01L29/4234 ,  H01L27/0629 ,  H01L29/1608 ,  H01L29/872

Abstract: An electronic device comprising: a semiconductor body of silicon carbide, SiC, having a first and a second face, opposite to one another along a first direction, which presents positive-charge carriers at said first face that form a positive interface charge; a first conduction terminal, which extends at the first face of the semiconductor body; a second conduction terminal, which extends on the second face of the semiconductor body; a channel region in the semiconductor body, configured to house, in use, a flow of electrons between the first conduction terminal and the second conduction terminal; and a trapping layer, of insulating material, which extends in electrical contact with the semiconductor body at said channel region and is designed so as to present electron-trapping states that generate a negative charge such as to balance, at least in part, said positive interface charge.

公开(公告)号：US11329131B2

公开(公告)日：2022-05-10

申请号：US17096635

申请日：2020-11-12

Applicant: STMicroelectronics S.r.l.

Inventor： Mario Giuseppe Saggio ,  Edoardo Zanetti ,  Alfio Guarnera

IPC: H01L29/08 ,  H01L29/16

Abstract: A MOSFET device includes a semiconductor body having a first and a second face. A source terminal of the MOSFET device includes a doped region which extends at the first face of the semiconductor body and a metal layer electrically coupled to the doped region. A drain terminal extends at the second face of the semiconductor body. The doped region includes a first sub-region having a first doping level and a first depth, and a second sub-region having a second doping level and a second depth. At least one among the second doping level and the second maximum depth has a value which is higher than a respective value of the first doping level and the first maximum depth. The metal layer is in electrical contact with the source terminal exclusively through the second sub-region.

公开(公告)号：US11270993B2

公开(公告)日：2022-03-08

申请号：US16780769

申请日：2020-02-03

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Mario Giuseppe Saggio ,  Simone Rascuná

IPC: H01L29/808 ,  H01L27/06 ,  H01L29/872 ,  H01L29/06 ,  H01L29/10 ,  H01L29/16 ,  H01L29/66 ,  H01L29/78 ,  H01L21/04 ,  H01L29/08 ,  H01L29/423

Abstract: An integrated MOSFET device is formed in a body of silicon carbide and with a first type of conductivity. The body accommodates a first body region, with a second type of conductivity; a JFET region adjacent to the first body region; a first source region, with the first type of conductivity, extending into the interior of the first body region; an implanted structure, with the second type of conductivity, extending into the interior of the JFET region. An isolated gate structure lies partially over the first body region, the first source region and the JFET region. A first metallization layer extends over the first surface and forms, in direct contact with the implanted structure and with the JFET region, a JBS diode.

公开(公告)号：US11251296B2

公开(公告)日：2022-02-15

申请号：US16528410

申请日：2019-07-31

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Mario Giuseppe Saggio ,  Edoardo Zanetti

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/16 ,  H01L29/10 ,  H01L29/423 ,  H01L29/06

Abstract: A MOSFET device comprising: a structural region, made of a semiconductor material having a first type of conductivity, which extends between a first side and a second side opposite to the first side along an axis; a body region, having a second type of conductivity opposite to the first type, which extends in the structural region starting from the first side; a source region, having the first type of conductivity, which extends in the body region starting from the first side; a gate region, which extends in the structural region starting from the first side, traversing entirely the body region; and a shielding region, having the second type of conductivity, which extends in the structural region between the gate region and the second side. The shielding region is an implanted region self-aligned, in top view, to the gate region.

公开(公告)号：US11018008B2

公开(公告)日：2021-05-25

申请号：US16209680

申请日：2018-12-04

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Edoardo Zanetti ,  Simone Rascuná ,  Mario Giuseppe Saggio ,  Alfio Guarnera ,  Leonardo Fragapane ,  Cristina Tringali

IPC: H01L21/04 ,  H01L21/285 ,  H01L29/872 ,  H01L29/66 ,  H01L29/16 ,  H01L29/78 ,  H01L29/06

Abstract: A manufacturing method of an electronic device includes: forming a drift layer of an N type; forming a trench in the drift layer; forming an edge-termination structure alongside the trench by implanting dopant species of a P type; and forming a depression region between the trench and the edge-termination structure by digging the drift layer. The steps of forming the depression region and the trench are carried out at the same time. The step of forming the depression region comprises patterning the drift layer to form a structural connection with the edge-termination structure having a first slope, and the step of forming the trench comprises etching the drift layer to define side walls of the trench, which have a second slope steeper than the first slope.

公开(公告)号：US20200044077A1

公开(公告)日：2020-02-06

申请号：US16528410

申请日：2019-07-31

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Mario Giuseppe Saggio ,  Edoardo Zanetti

IPC: H01L29/78 ,  H01L29/16 ,  H01L29/423 ,  H01L29/66

Abstract: A MOSFET device comprising: a structural region, made of a semiconductor material having a first type of conductivity, which extends between a first side and a second side opposite to the first side along an axis; a body region, having a second type of conductivity opposite to the first type, which extends in the structural region starting from the first side; a source region, having the first type of conductivity, which extends in the body region starting from the first side; a gate region, which extends in the structural region starting from the first side, traversing entirely the body region; and a shielding region, having the second type of conductivity, which extends in the structural region between the gate region and the second side. The shielding region is an implanted region self-aligned, in top view, to the gate region.