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公开(公告)号:US10276729B2
公开(公告)日:2019-04-30
申请号:US15671615
申请日:2017-08-08
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Mario Giuseppe Saggio , Simone Rascuna′
IPC: H01L23/48 , H01L23/52 , H01L29/40 , H01L29/872 , H01L29/417 , H01L29/66 , H01L29/06 , H01L29/16 , H01L21/225 , H01L21/768 , H01L23/535 , H01L29/20
Abstract: A switching device including: a body of semiconductor material, which has a first conductivity type and is delimited by a front surface; a contact layer of a first conductive material, which extends in contact with the front surface; and a plurality of buried regions, which have a second conductivity type and are arranged within the semiconductor body, at a distance from the contact layer.
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公开(公告)号:US11869771B2
公开(公告)日:2024-01-09
申请号:US17458102
申请日:2021-08-26
Applicant: STMICROELECTRONICS S.r.l.
Inventor: Simone Rascuna′ , Mario Giuseppe Saggio
CPC classification number: H01L21/045 , H01L29/1608 , H01L29/66053
Abstract: A manufacturing method of an anchorage element of a passivation layer, comprising: forming, in a semiconductor body made of SiC and at a distance from a top surface of the semiconductor body, a first implanted region having, along a first axis, a first maximum dimension; forming, in the semiconductor body, a second implanted region, which is superimposed to the first implanted region and has, along the first axis, a second maximum dimension smaller than the first maximum dimension; carrying out a process of thermal oxidation of the first implanted region and second implanted region to form an oxidized region; removing said oxidized region to form a cavity; and forming, on the top surface, the passivation layer protruding into the cavity to form said anchorage element fixing the passivation layer to the semiconductor body.
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公开(公告)号:US09748411B2
公开(公告)日:2017-08-29
申请号:US15059779
申请日:2016-03-03
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Mario Giuseppe Saggio , Simone Rascuna′
IPC: H01L31/0312 , H01L21/8238 , H01L29/872 , H01L29/417 , H01L29/66 , H01L29/06 , H01L29/16 , H01L21/225 , H01L21/768 , H01L23/535 , H01L29/20
CPC classification number: H01L29/872 , H01L21/2253 , H01L21/76897 , H01L23/535 , H01L29/0623 , H01L29/1608 , H01L29/2003 , H01L29/417 , H01L29/6606 , H01L29/66143
Abstract: A switching device including: a body of semiconductor material, which has a first conductivity type and is delimited by a front surface; a contact layer of a first conductive material, which extends in contact with the front surface; and a plurality of buried regions, which have a second conductivity type and are arranged within the semiconductor body, at a distance from the contact layer.
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4.
公开(公告)号:US12224358B2
公开(公告)日:2025-02-11
申请号:US17584185
申请日:2022-01-25
Applicant: STMicroelectronics S.r.l.
Inventor: Simone Rascuna′ , Gabriele Bellocchi , Marco Santoro
IPC: H01L29/872 , H01L21/04 , H01L29/16 , H01L29/66
Abstract: A Junction Barrier Schottky device includes a semiconductor body of SiC having a first conductivity. An implanted region having a second conductivity, extends into the semiconductor body from a top surface of the semiconductor body to form a junction barrier diode with the semiconductor body. An electrical terminal is in ohmic contact with the implanted region and in direct electrical contact with the top surface, laterally to the implanted region, to form a Schottky diode with the semiconductor body. The implanted region is formed by a first and a second portion electrically connected directly to each other and aligned along an alignment axis transverse to the top surface. Orthogonally to the alignment axis, the first portion has a first maximum width and the second portion has a second maximum width greater than the first maximum width.
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5.
公开(公告)号:US12094985B2
公开(公告)日:2024-09-17
申请号:US17818926
申请日:2022-08-10
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Simone Rascuna′ , Mario Giuseppe Saggio
CPC classification number: H01L29/872 , H01L29/0619 , H01L29/1608 , H01L29/2003 , H01L29/45 , H01L29/47 , H01L29/66143 , H01L29/66212
Abstract: A merged-PN-Schottky, MPS, diode includes an N substrate, an N-drift layer, a P-doped region in the drift layer, an ohmic contact on the P-doped region, a plurality of cells within the P-doped region and being portions of the drift layer where the P-doped region is absent, an anode metallization on the ohmic contact and on said cells, to form junction-barrier contacts and Schottky contacts respectively. The P-doped region has a grid-shaped layout separating from one another each cell and defining, together with the cells, an active area of the MPS diode. Each cell has a same geometry among quadrangular, quadrangular with rounded corners and circular; and the ohmic contact extends at the doped region with continuity along the grid-shaped layout.
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6.
公开(公告)号:US12051725B2
公开(公告)日:2024-07-30
申请号:US18309584
申请日:2023-04-28
Applicant: STMICROELECTRONICS S.r.l.
Inventor: Simone Rascuna′ , Paolo Badala′ , Anna Bassi , Gabriele Bellocchi
IPC: H01L29/872 , H01L29/16 , H01L29/66
CPC classification number: H01L29/1608 , H01L29/1606 , H01L29/6603 , H01L29/66143 , H01L29/872
Abstract: A method for manufacturing a SiC-based electronic device, that includes implanting, at a front side of a solid body of SiC having a conductivity of N type, dopant species of P type, thus forming an implanted region that extends in depth in the solid body starting from the front side and has a top surface co-planar with said front side; and generating a laser beam directed towards the implanted region in order to generate heating of the implanted region at temperatures comprised between 1500° C. and 2600° C. so as to form an ohmic contact region including one or more carbon-rich layers, for example graphene and/or graphite layers, in the implanted region and, simultaneously, activation of the dopant species of P type.
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7.
公开(公告)号:US11495508B2
公开(公告)日:2022-11-08
申请号:US17039289
申请日:2020-09-30
Applicant: STMicroelectronics S.r.l.
Inventor: Simone Rascuna′ , Claudio Chibbaro , Alfio Guarnera , Mario Giuseppe Saggio , Francesco Lizio
Abstract: An electronic power device includes a substrate of silicon carbide (SiC) having a front surface and a rear surface which lie in a horizontal plane and are opposite to one another along a vertical axis. The substrate includes an active area, provided in which are a number of doped regions, and an edge area, which is not active, distinct from and surrounding the active area. A dielectric region is arranged above the front surface, in at least the edge area. A passivation layer is arranged above the front surface of the substrate, and is in contact with the dielectric region in the edge area. The passivation layer includes at least one anchorage region that extends through the thickness of the dielectric region at the edge area, such as to define a mechanical anchorage for the passivation layer.
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8.
公开(公告)号:US11417778B2
公开(公告)日:2022-08-16
申请号:US16825214
申请日:2020-03-20
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Simone Rascuna′ , Mario Giuseppe Saggio
Abstract: A merged-PN-Schottky, MPS, diode includes an N substrate, an N-drift layer, a P-doped region in the drift layer, an ohmic contact on the P-doped region, a plurality of cells within the P-doped region and being portions of the drift layer where the P-doped region is absent, an anode metallization on the ohmic contact and on said cells, to form junction-barrier contacts and Schottky contacts respectively. The P-doped region has a grid-shaped layout separating from one another each cell and defining, together with the cells, an active area of the MPS diode. Each cell has a same geometry among quadrangular, quadrangular with rounded corners and circular; and the ohmic contact extends at the doped region with continuity along the grid-shaped layout.
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