LIGHT EMITTING DISPLAY DEVICE
    11.
    发明申请

    公开(公告)号:US20220231107A1

    公开(公告)日:2022-07-21

    申请号:US17472088

    申请日:2021-09-10

    Abstract: A light emitting display device including: a first pixel including a first lower storage electrode, a first gate electrode of a first driving transistor, and a first upper storage electrode; and a second pixel provided near the first pixel, and including a second lower storage electrode, a second gate electrode of a second driving transistor, and a second upper storage electrode. In a plan view, the first gate electrode and the second gate electrode have first sides facing each other, the first side of the first gate electrode is positioned inside a border of the first lower storage electrode or the first upper storage electrode in a plan view, and the first side of the second gate electrode is positioned inside a border of the second lower storage electrode or the second upper storage electrode in a plan view.

    Display device
    12.
    发明授权

    公开(公告)号:US10943515B2

    公开(公告)日:2021-03-09

    申请号:US16139419

    申请日:2018-09-24

    Abstract: A display device includes: a first pixel including a first light emitting diode (LED) and a first capacitor including a first electrode connected to a first power source voltage providing a driving voltage to an anode of the first light emitting diode (LED) or to an initialization voltage, and a second electrode connected to the anode of the first light emitting diode (LED); and a second pixel including a second light emitting diode (LED) and a second capacitor including a first electrode connected to the first power source voltage providing the driving voltage to an anode of the second light emitting diode (LED) or to an initialization voltage, and a second electrode connected to the anode of the second light emitting diode (LED), wherein capacitance of the second capacitor is less than capacitance of the first capacitor.

    Scan driver and driving method thereof

    公开(公告)号:US10347207B2

    公开(公告)日:2019-07-09

    申请号:US15136287

    申请日:2016-04-22

    Abstract: A scan driver includes a plurality of stages to receive one or more clock signals, each of the plurality of stages to supply a carry signal to a corresponding first output terminal and to supply a scan signal to a corresponding second output terminal, corresponding to a voltage of a corresponding first node, and each of the plurality of stages including a reset unit, the reset unit to initialize the first node, the first output terminal, and the second output terminal, corresponding to a gate start pulse supplied to a corresponding reset input terminal.

    Pixel, display device comprising the same and having an initialization period and driving method thereof

    公开(公告)号:US09842537B2

    公开(公告)日:2017-12-12

    申请号:US14991900

    申请日:2016-01-08

    Abstract: A display device includes: a display unit including a plurality of pixels, each of the pixels including: an OLED; and a driving transistor to supply current to an anode of the OLED according to a voltage applied to a gate of the driving transistor and a power supply voltage; a scan driver to supply scan signals to the pixels; an initialization driver to supply initializing signals to the pixels; a data driver to supply data signals to the pixels; light emission drivers to supply first and second light emission signals to the pixels; and a power supply to supply the power supply voltage and an initialization voltage to the pixels, wherein the initialization voltage is supplied to the anode during a first period, and the power supply voltage corresponding to a threshold voltage of the driving transistor is supplied to the gate during a first sub-period of the first period.

    SCAN DRIVER AND DRIVING METHOD THEREOF
    15.
    发明申请
    SCAN DRIVER AND DRIVING METHOD THEREOF 审中-公开
    扫描驱动器及其驱动方法

    公开(公告)号:US20170076684A1

    公开(公告)日:2017-03-16

    申请号:US15136287

    申请日:2016-04-22

    CPC classification number: G09G3/3677 G09G2310/0286 G11C19/287

    Abstract: A scan driver includes a plurality of stages to receive one or more clock signals, each of the plurality of stages to supply a carry signal to a corresponding first output terminal and to supply a scan signal to a corresponding second output terminal, corresponding to a voltage of a corresponding first node, and each of the plurality of stages including a reset unit, the reset unit to initialize the first node, the first output terminal, and the second output terminal, corresponding to a gate start pulse supplied to a corresponding reset input terminal.

    Abstract translation: 扫描驱动器包括多个级以接收一个或多个时钟信号,多个级中的每一个级将进位信号提供给对应的第一输出端,​​并将扫描信号提供给相应的第二输出端,对应于电压 并且所述多个级中的每一个包括复位单元,所述复位单元用于初始化所述第一节点,所述第一输出端子和所述第二输出端子,对应于提供给相应的复位输入的门启动脉冲 终奌站。

    Scan driver
    17.
    发明授权

    公开(公告)号:US11227552B2

    公开(公告)日:2022-01-18

    申请号:US16903307

    申请日:2020-06-16

    Abstract: A scan driver including a plurality of scan stages. A first scan stage among the plurality of scan stages includes first-to-sixth transistors and a first capacitor. The first transistor is connected to a first Q node, a first scan clock line, and a first scan line. A second transistor is connected to a first scan carry line and the first Q node. A third transistor is connected to a first sensing carry line and a second sensing carry line. A fourth transistor is connected to a first control line and the third transistor. A fifth transistor is connected to the fourth transistor, a second control line, and a first node. A first capacitor is connected to the fifth transistor. A sixth transistor is connected to a third control line, the first node, and the first Q node.

    Scan driver
    18.
    发明授权

    公开(公告)号:US11151931B2

    公开(公告)日:2021-10-19

    申请号:US16881757

    申请日:2020-05-22

    Abstract: A scan driver includes scan stages, an n-th scan stage of the scan stages includes a first driving circuit, a second driving circuit, and an output circuit. The first driving circuit controls a voltage of a first driving node, based on an input signal and a voltage of a second driving node. The second driving circuit controls the voltage of the second driving node, based on a second clock signal and a first voltage. The output circuit outputs a first clock signal as a scan signal and a carry signal, and outputs a second voltage as the scan signal and the carry signal. The first driving circuit includes a first transistor including a gate electrode electrically connected to the second driving node, one electrode electrically connected to an input line that provides the input signal, and another electrode electrically connected to the first driving node.

    Display device utilizing a data driver accounting for parasitic capacitances

    公开(公告)号:US10102807B2

    公开(公告)日:2018-10-16

    申请号:US15157350

    申请日:2016-05-17

    Abstract: There is provided a display device including a display including a first pixel connected to a first data line and a second pixel connected to a second data line, a data signal generator configured to generate an output signal, and a signal divider configured to divide the output signal, to generate a first data signal and a second data signal, and to apply the first data signal and the second data signal to the first data line and the second data line, respectively, wherein the data signal generator is configured to generate the output signal based on a coupling effect of a first parasitic capacitor formed between the first data line and the second data line and a coupling effect of a parasitic capacitor of a data line formed by the first data line and second data line.

    Display device including parasitic capacitance electrodes

    公开(公告)号:US10031390B2

    公开(公告)日:2018-07-24

    申请号:US14997817

    申请日:2016-01-18

    Abstract: A display device including a first base substrate, gate lines disposed on the first base substrate and extending in a first direction, parasitic capacitance electrodes coupled to the gate lines, data lines extending in a second direction crossing the first direction, transistors, each coupled to one of the gate lines and coupled to one of the data lines, and pixels sequentially arranged in the first direction, each of the pixels coupled to a corresponding one of the transistors, respectively, in which each of the transistors includes a gate electrode, a source electrode, and a drain electrode, and wherein widths of the parasitic capacitance electrodes in adjacent pixels measured along the first direction are different from each other.

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