公开(公告)号：US08834968B2

公开(公告)日：2014-09-16

申请号：US13708914

申请日：2012-12-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byoung-Jae Bae ,  Sung-Lae Cho ,  Jin-Il Lee ,  Hye-Young Park ,  Do-Hyung Kim

IPC: C23C16/30 ,  H01L21/71 ,  H01L45/00 ,  C01B19/04 ,  G11C13/00 ,  C23C16/455 ,  H01L27/24

CPC classification number: C01B19/04 ,  C23C16/305 ,  C23C16/45531 ,  C23C16/45553 ,  G11C13/0004 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/124 ,  H01L45/144 ,  H01L45/148 ,  H01L45/1616 ,  H01L45/1683 ,  H01L45/1691

Abstract: In one aspect, a method of forming a phase change material layer is provided. The method includes supplying a reaction gas including the composition of Formula 1 into a reaction chamber, supplying a first source which includes Ge(II) into the reaction chamber, and supplying a second source into the reaction chamber. Formula 1 is NR1R2R3, where R1, R2 and R3 are each independently at least one selected from the group consisting of H, CH3, C2H5, C3H7, C4H9, Si(CH3)3, NH2, NH(CH3), N(CH3)2, NH(C2H5) and N(C2H5)2.

公开(公告)号：US10956159B2

公开(公告)日：2021-03-23

申请号：US14554785

申请日：2014-11-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae-Un Park ,  Suk-Jin Kim ,  Do-Hyung Kim

IPC: G06F9/30 ,  G06F9/38

Abstract: In a method to execute instructions, at least one instruction executed in a predetermined cycle is acquired based on information included in each of a plurality of instructions, and a code included in the at least one instruction acquired. An instruction is allocated to at least one slot based on the analysis result, and a slot necessary to execute the instruction is selectively used. Accordingly, power consumption of a device using the method may be reduced.

公开(公告)号：US09748953B2

公开(公告)日：2017-08-29

申请号：US15202839

申请日：2016-07-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae-Jun Lee ,  Do-Hyung Kim ,  Yong-Jin Kim ,  Bo-Ra Kim ,  Jeong-Hoon Baek ,  Kwang-Seop Kim ,  Da-Ae Heo

IPC: H03K19/00 ,  G11C7/00 ,  G11C5/04

CPC classification number: H03K19/0005 ,  G11C5/04 ,  G11C7/00

Abstract: A memory module includes a command/address (CA) register, memory devices, and a module resistor unit mounted on a circuit board. The centrally disposed CA register drive the memory devices one or more internal CA signal(s) to arrangements of memory devices using multiple CA transmission lines, wherein the multiple internal CA transmission lines are commonly terminated in the module resistor unit.

公开(公告)号：US20140149684A1

公开(公告)日：2014-05-29

申请号：US13955687

申请日：2013-07-31

Applicant: SAMSUNG ELECTRONICS CO., LTD

Inventor： Wonchang LEE ,  Do-Hyung Kim ,  S.H. Lee

IPC: G06F12/08

CPC classification number: G06F12/0875 ,  G06F2212/455 ,  H04N19/42

Abstract: An apparatus and method for controlling a cache may include a cache controller configured to collect a portion of data corresponding to a cache miss in the data at one time, and a data operation unit configured to perform an operation on the data based on the collected data.

Abstract translation: 用于控制高速缓存的装置和方法可以包括：高速缓存控制器，被配置为一次收集对应于数据中的高速缓存未命中的一部分数据;以及数据操作单元，被配置为基于所收集的数据对数据执行操作 。