公开(公告)号：US20240014243A1

公开(公告)日：2024-01-11

申请号：US18295966

申请日：2023-04-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minho Jang ,  Doowon Kwon ,  Kyungtae Lim ,  Donghyun Kim

IPC: H01L27/146

CPC classification number: H01L27/14634 ,  H01L27/14645 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14636 ,  H01L27/1469

Abstract: An image sensor includes a first substrate having a first transistor integrated therein, and a first plurality of wiring structures on the first substrate. The first plurality of wiring structures include a first wiring structure electrically connected to the first transistor. A second substrate extends on the first plurality of wiring structures, and has a second transistor integrated therein, which is electrically connected to a second wiring structure within the first plurality of wiring structures. A second plurality of wiring structures extend on the second substrate. A third substrate is provided on the second plurality of wiring structures. A microlens extends on a light receiving surface of the third substrate. A light sensing element extends within the third substrate. A transfer gate (TG) extends into a portion of the third substrate, extends adjacent the light sensing element, and is electrically connected to a first wiring structure within the second plurality of wiring structures. A floating diffusion (FD) region extends within the third substrate and adjacent the TG. The FD region is electrically connected to a second wiring structure within the second plurality of wiring structures.

公开(公告)号：US11776982B2

公开(公告)日：2023-10-03

申请号：US17134699

申请日：2020-12-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minho Jang ,  Doowon Kwon ,  Dongchan Kim ,  Bokwon Kim ,  Kyungrae Byun ,  Jungchak Ahn ,  Hyunyoung Yeo

IPC: H01L27/146 ,  H01L25/065

CPC classification number: H01L27/14636 ,  H01L25/0657 ,  H01L27/14621 ,  H01L27/14623 ,  H01L27/14627 ,  H01L2225/06541

Abstract: An image sensor chip includes a lower chip, an upper chip stacked on the lower chip and including a photoelectric element, a via hole penetrating through the upper chip and penetrating through at least a portion of the lower chip, and a conductive connection layer electrically connecting the lower chip and the upper chip to each other in the via hole. The upper chip includes an upper substrate, an upper isolation layer and an upper element on the upper substrate, a connection contact plug, and a multilayer interconnection line electrically connected to the connection contact plug. A distance between an upper surface of the connection contact plug and an upper surface of the upper isolation layer is greater than a distance between an upper surface of an upper gate electrode of the upper element and an upper surface of the upper isolation layer.

公开(公告)号：US11183526B2

公开(公告)日：2021-11-23

申请号：US16701750

申请日：2019-12-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： In Ho Ro ,  Doowon Kwon ,  Seokjin Kwon ,  Jameyung Kim ,  Jinyoung Kim ,  Sungki Min ,  Kwansik Cho ,  Mangeun Cho ,  Ho-Chul Ji

IPC: H01L21/00 ,  H01L27/146

Abstract: An image sensor including a semiconductor substrate having a first surface and a second surface, and a pixel region having a photoelectric conversion region; a first conductive pattern in a first trench defining the pixel region and extending from the first surface toward the second surface; a second conductive pattern in a second trench shallower than the first trench and defined between a plurality of active patterns on the first surface of the pixel region; a transfer transistor and a plurality of logic transistors on the active patterns; and a conductive line on the second surface and electrically connected to the first conductive pattern.

公开(公告)号：US20210134873A1

公开(公告)日：2021-05-06

申请号：US16898212

申请日：2020-06-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Doowon Kwon ,  Ingyu Baek

IPC: H01L27/146

Abstract: An image sensor includes a first layer including pixels in a pixel array, and a first logic circuit configured to control the pixel array. Each of the pixels include at least one photodiode configured to generate a charge in response to light, and a pixel circuit configured to generate a pixel signal corresponding to the charge. A second layer includes a second logic circuit that is connected to the pixel array and the first logic circuit and is on the first layer. A third layer includes storage elements that are electrically connected to at least one of the pixels or the first logic circuit and an insulating layer on the storage elements. A lower surface of the insulating layer is attached to an upper portion of the first layer, and an upper surface of the insulating layer is attached to a lower portion of the second layer.