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    Semiconductor device and method of forming the same
    1.
    发明授权
    Semiconductor device and method of forming the same 有权

    公开(公告)号：US11462623B2

    公开(公告)日：2022-10-04

    申请号：US17222474

    申请日：2021-04-05

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Junghwan Huh ,  Dongchan Kim ,  Dae Hyun Kim ,  Euiju Kim ,  Jisoo Lee

    IPC: H01L29/423 ,  H01L29/78 ,  H01L29/51 ,  H01L29/49

    Abstract: A semiconductor device includes a substrate including an active region, a gate trench disposed in the substrate and crossing the active region; a gate dielectric layer disposed in the gate trench; a first gate electrode disposed on the gate dielectric layer and including center and edge portions; a second gate electrode disposed on the first gate electrode; a gate capping insulating layer disposed on the second gate electrode and filling the gate trench; and first and second impurity regions disposed in the substrate opposite to each other with respect to the gate trench. A top surface of each of the center and edge portions contacts a bottom surface of the second gate electrode. The top surface of the second gate electrode is concave. The bottom surface of the gate capping insulating layer is convex, and a side surface of the gate capping insulating layer contacts the gate dielectric layer.

    Semiconductor device and method of forming the same
    2.
    发明授权
    Semiconductor device and method of forming the same 有权

    公开(公告)号：US10985255B2

    公开(公告)日：2021-04-20

    申请号：US16523529

    申请日：2019-07-26

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Junghwan Huh ,  Dongchan Kim ,  Dae Hyun Kim ,  Euiju Kim ,  Jisoo Lee

    IPC: H01L29/423 ,  H01L29/78 ,  H01L29/51 ,  H01L29/49

    Abstract: A semiconductor device and a method of forming the same are provided. The semiconductor device includes a gate trench crossing an active region, and a gate structure in the gate trench. The gate structure includes a gate dielectric layer disposed on an inner wall of the gate trench, a gate electrode disposed on the gate electric layer and partially filling the gate trench, a gate capping insulating layer disposed on the gate electrode, and a gap-fill insulating layer disposed in the gate trench and disposed on the gate capping insulating layer. The gate capping insulating layer includes a material formed by oxidizing a portion of the gate electrode, nitriding the portion of the gate electrode, or oxidizing and nitriding the portion of the gate electrode.

    METHODS OF FORMING SEMICONDUCTOR DEVICES USING HARD MASKS
    3.
    发明申请
    METHODS OF FORMING SEMICONDUCTOR DEVICES USING HARD MASKS 有权
    使用硬掩模形成半导体器件的方法

    公开(公告)号：US20150104947A1

    公开(公告)日：2015-04-16

    申请号：US14510331

    申请日：2014-10-09

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Dongchan Kim ,  Gyungjin Min ,  Minjoon Park ,  Seunghoon Park ,  KeunHee Bai ,  Kisoo Chang

    IPC: H01L21/308 ,  H01L21/306

    CPC classification number: H01L21/31111 ,  H01L21/31122 ,  H01L21/31133 ,  H01L21/31138 ,  H01L21/32139 ,  H01L29/66545 ,  H01L29/66795

    Abstract: Methods of forming a semiconductor device are provided. The methods may include forming an insulating layer including silicon on a substrate and sequentially forming a first hard mask layer and a second hard mask layer on the substrate. The first hard mask layer may include carbon, and the second hard mask layer may include carbon and impurities. The first and second hard mask layers may expose at least a portion of the insulating layer. The methods may also include performing an etching process to selectively remove the second hard mask layer with respect to the insulating layer. A ratio of etch rates between the second hard mask layer and the insulating layer during the etching process may be in a range of about 100:1 to about 10,000:1.

    Abstract translation: 提供了形成半导体器件的方法。 所述方法可以包括在衬底上形成包括硅的绝缘层，并且在衬底上依次形成第一硬掩模层和第二硬掩模层。 第一硬掩模层可以包括碳，第二硬掩模层可以包括碳和杂质。 第一和第二硬掩模层可以暴露绝缘层的至少一部分。 所述方法还可以包括执行蚀刻工艺以相对于绝缘层选择性地去除第二硬掩模层。 在蚀刻过程中，第二硬掩模层和绝缘层之间的蚀刻速率的比可以在约100:1至约10,000:1的范围内。

    Methods of fabricating a semiconductor device with capacitors using mold structure and protection layer
    4.
    发明授权
    Methods of fabricating a semiconductor device with capacitors using mold structure and protection layer 有权
    使用模具结构和保护层制造具有电容器的半导体器件的方法

    公开(公告)号：US08969167B2

    公开(公告)日：2015-03-03

    申请号：US13952207

    申请日：2013-07-26

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Junho Yoon ,  Dongchan Kim ,  Gyungjin Min ,  Jaehong Park ,  Yongmoon Jang ,  Je-Woo Han

    IPC: H01L21/20 ,  H01L49/02

    CPC classification number: H01L28/40 ,  H01L28/90

    Abstract: A method of fabricating a semiconductor device with capacitors may include forming a mold structure on a lower structure, patterning the mold structure to form a plurality of holes exposing the lower structure, forming a protection layer on sidewalls of the mold structure exposed by the holes, forming lower electrodes in the holes provided with the protection layer, removing the mold structure to expose the protection layer, removing the protection layer to expose sidewalls of the lower electrodes, and sequentially forming a dielectric film and an upper electrode on the lower electrodes.

    Abstract translation: 制造具有电容器的半导体器件的方法可以包括在下部结构上形成模具结构，图案化模具结构以形成暴露下部结构的多个孔，在由孔露出的模具结构的侧壁上形成保护层， 在设置有保护层的孔中形成下电极，去除模具结构以露出​​保护层，去除保护层以暴露下电极的侧壁，并且在下电极上依次形成电介质膜和上电极。

    METHOD AND SERVER FOR GENERATING SPATIAL MAP
    5.
    发明公开
    METHOD AND SERVER FOR GENERATING SPATIAL MAP 审中-公开

    公开(公告)号：US20240118103A1

    公开(公告)日：2024-04-11

    申请号：US18370595

    申请日：2023-09-20

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jaewook SHIN ,  Dongchan Kim ,  Dongnam Byun ,  Jinyoung Hwang ,  Sejin Kwak ,  Geunho Lee

    IPC: G01C21/00 ,  G01C21/20 ,  G01C21/32

    CPC classification number: G01C21/3811 ,  G01C21/206 ,  G01C21/32

    Abstract: Provided is a method, performed by a server, of providing a personalized spatial map, the method comprising: obtaining a first spatial map including first map features representing spatial information about a space; obtaining a second spatial map based on sensor data obtained by measuring the space, the second spatial map including second map features; identifying third map features for map alignment from among the first map features and the second map features; aligning the first spatial map and the second spatial map, based on the identified third map features; identifying local areas in the space where at least one difference exists between the first spatial map and the second spatial map; and generating the personalized spatial map by identifying pieces of spatial information about the local areas based on the second map features.

    Electronic device and controlling method of electronic device
    8.
    发明授权
    Electronic device and controlling method of electronic device 有权

    公开(公告)号：US11290640B2

    公开(公告)日：2022-03-29

    申请号：US17337009

    申请日：2021-06-02

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jaeyeop Lee ,  Dongchan Kim ,  Jongmyeong Ban ,  Hyechan Bae ,  Dongnam Byun ,  Seongwo Oh ,  Haedong Yeo ,  Jinyoung Hwang

    IPC: H04N5/232 ,  H04N5/225 ,  H04N5/262 ,  H04N1/21

    Abstract: An electronic device and a controlling method of the electronic device are provided. The controlling method of an electronic device according to the disclosure includes the steps of, based on a first user input for or related to acquiring a live view image through a camera including a plurality of lenses different from one another being received, acquiring a plurality of image frames for each of the plurality of lenses and storing the image frames in a first memory, inputting the plurality of image frames for each lens stored in the first memory into a neural network model, by a predetermined time interval, and acquiring score information including composition preference information of each of the input image frames, selecting at least one lens among the plurality of lenses based on the score information, storing image frames acquired through the selected at least one lens in a second memory during the predetermined time interval, and based on a second user input for initiating recording of the live view image being received, storing an image related to the image frames stored in the second memory in a third memory until a time point when a third user input for ending the recording is received.

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