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公开(公告)号:US20250142233A1
公开(公告)日:2025-05-01
申请号:US18885926
申请日:2024-09-16
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Changhwa Kim , Gwideok Ryan Lee , Doowon Kwon , Daehoon Kim , Changyong Um
IPC: H04N25/79 , H01L27/146
Abstract: A stacked image sensor includes a first semiconductor chip, wherein the first semiconductor chip includes a first contact electrically connected to the first transfer transistor and disposed to extend in a Z-axis direction, a second contact electrically connected to the second transfer transistor and disposed to extend in the Z-axis direction, a plurality of third contacts electrically connected with each of the first floating diffusion region and the second floating diffusion region and disposed to extend in the Z-axis direction, and a first metal region configured to electrically connect the plurality of third contacts to one another and disposed to extend in the Z-axis direction, and the first contact, the second contact, and the first metal region contact a first surface of a first interlayer insulation layer where the first contact, the second contact, and the first metal region are formed.
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公开(公告)号:US11652130B2
公开(公告)日:2023-05-16
申请号:US16898212
申请日:2020-06-10
Applicant: Samsung Electronics Co., Ltd.
Inventor: Doowon Kwon , Ingyu Baek
IPC: H01L27/146
CPC classification number: H01L27/14643 , H01L27/14609 , H01L27/14634 , H01L27/14636
Abstract: An image sensor includes a first layer including pixels in a pixel array, and a first logic circuit configured to control the pixel array. Each of the pixels include at least one photodiode configured to generate a charge in response to light, and a pixel circuit configured to generate a pixel signal corresponding to the charge. A second layer includes a second logic circuit that is connected to the pixel array and the first logic circuit and is on the first layer. A third layer includes storage elements that are electrically connected to at least one of the pixels or the first logic circuit and an insulating layer on the storage elements. A lower surface of the insulating layer is attached to an upper portion of the first layer, and an upper surface of the insulating layer is attached to a lower portion of the second layer.
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公开(公告)号:US20220392941A1
公开(公告)日:2022-12-08
申请号:US17721914
申请日:2022-04-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Doowon Kwon , Changrok Moon , Kyungtae Lim
IPC: H01L27/146 , H04N5/369 , H04N5/353 , H01L23/00
Abstract: Provided is an image sensor including a first layer including a first semiconductor substrate including a pixel unit in which a plurality of unit pixels are provided, and a first wiring layer provided on the first semiconductor substrate, a second layer including a second semiconductor substrate on which a plurality of transistors configured to operate a global shutter operation are provided, and a second wiring layer provided on the second semiconductor substrate, and provided on the first layer such that the first wiring layer and the second wiring layer oppose each other in a first direction, a plurality of first bonding structures bonding the first layer to the second layer based on a first bonding metal exposed on a surface of the first wiring layer being in contact with a second bonding metal exposed on a surface of the second wiring layer, a third layer including a third semiconductor substrate on which a logic circuit is provided, and a third wiring layer provided on the third semiconductor substrate, and bonded to the second layer such that the second semiconductor substrate and the third wiring layer oppose each other in the first direction, and a plurality of second bonding structures extending from the second wiring layer, and bonding the second layer to the third layer based on a bonding via penetrating the second semiconductor substrate being in contact with a third bonding metal exposed to a surface of the third wiring layer.
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公开(公告)号:US10930685B2
公开(公告)日:2021-02-23
申请号:US16390325
申请日:2019-04-22
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Doowon Kwon , Ingyu Baek
IPC: H01L27/146 , H01L23/522 , H01L49/02 , H01L27/148 , H04N5/232
Abstract: Disclosed is an image sensor comprising a first substrate including a plurality of pixels, a photoelectric conversion region in the first substrate at each of the pixels, a first capacitor on the first substrate, and a shield structure spaced apart from and surrounding the first capacitor.
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公开(公告)号:US20210050379A1
公开(公告)日:2021-02-18
申请号:US16821352
申请日:2020-03-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Ingyu Baek , Doowon Kwon
IPC: H01L27/146 , H01L23/00
Abstract: An image sensor is provided. The image sensor includes a first substrate; a plurality of photoelectric conversion units positioned in the first substrate; a first connection layer disposed on the first substrate; a plurality of first pixel pads disposed on the first connection layer; a plurality of first peripheral pads disposed on the first substrate; a plurality of second pixel pads respectively positioned on the plurality of first pixel pads; a plurality of second peripheral pads respectively positioned on the plurality of first peripheral pads; a second connection layer disposed on the plurality of second pixel pads and the plurality of second peripheral pads; a device disposed on the second connection layer; and a second substrate disposed on the second connection layer and the device, wherein a pitch of the plurality of first pixel pads is substantially the same as a pitch of the plurality of pixel regions of the first substrate.
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公开(公告)号:US09859321B2
公开(公告)日:2018-01-02
申请号:US15333382
申请日:2016-10-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Donghyun Kim , Doowon Kwon
IPC: H01L31/062 , H01L31/113 , H01L27/146
CPC classification number: H01L27/14634 , H01L27/14621 , H01L27/14627 , H01L27/1464 , H01L27/14645 , H01L27/1469
Abstract: A stack-type semiconductor device includes a lower device and an upper device disposed on the lower device. The lower device includes a lower substrate, a lower interconnection on the lower substrate, a lower pad on the lower interconnection, and a lower interlayer insulating layer covering side surfaces of the lower interconnection and the lower pad. The upper device includes an upper substrate, an upper interconnection under the upper substrate, an upper pad under the upper interconnection, and an upper interlayer insulating layer covering side surfaces of the upper interconnection and the upper pad. Each of the pads has a thick portion and a thin portion. The thin portions of the pads are bonded to each other, the thick portion of the lower pad contacts the bottom of the upper interlayer insulating layer, and the thick portion of the upper pad contacts the top of the lower interlayer insulating layer.
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公开(公告)号:US20250031467A1
公开(公告)日:2025-01-23
申请号:US18737207
申请日:2024-06-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sooyoung Kang , Doowon Kwon , Yongjun Kim , Sol Yoon , Keunhyoung Park , Dongjun Oh
IPC: H01L27/146 , H04N25/79
Abstract: An image sensor is described comprising a first, a second, and a third stack mounted together. The first stack includes a first semiconductor substrate with a photoelectric conversion region, a floating diffusion region, and a transmission gate. The photoelectric conversion region absorbs light, and the charges freed by the light absorption are stored in the floating diffusion region prior to being transferred to other circuitry by the transmission gate. The transmission gate comprises an etch stop film on an upper surface and on a sidewall. The second stack, attached to the first stack, includes a second semiconductor substrate in which is located a pixel gate. The pixel gate is electrically connected with the floating diffusion region and further comprises a gate spacer on a sidewall of the pixel gate. The third stack, attached to the second stack, includes a logic transistor.
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公开(公告)号:US20210351220A1
公开(公告)日:2021-11-11
申请号:US17134699
申请日:2020-12-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Minho Jang , Doowon Kwon , Dongchan Kim , Bokwon Kim , Kyungrae Byun , Jungchak Ahn , Hyunyoung Yeo
IPC: H01L27/146
Abstract: An image sensor chip includes a lower chip, an upper chip stacked on the lower chip and including a photoelectric element, a via hole penetrating through the upper chip and penetrating through at least a portion of the lower chip, and a conductive connection layer electrically connecting the lower chip and the upper chip to each other in the via hole. The upper chip includes an upper substrate, an upper isolation layer and an upper element on the upper substrate, a connection contact plug, and a multilayer interconnection line electrically connected to the connection contact plug. A distance between an upper surface of the connection contact plug and an upper surface of the upper isolation layer is greater than a distance between an upper surface of an upper gate electrode of the upper element and an upper surface of the upper isolation layer.
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公开(公告)号:US09780136B2
公开(公告)日:2017-10-03
申请号:US15273029
申请日:2016-09-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Doowon Kwon
IPC: H01L27/146 , H04N5/225 , H01L23/522 , H01L23/00 , H01L23/498 , H01L25/065
CPC classification number: H01L27/14634 , H01L23/49827 , H01L23/5226 , H01L24/32 , H01L25/0657 , H01L27/11582 , H01L27/14618 , H01L27/1462 , H01L27/14621 , H01L27/14627 , H01L27/14636 , H01L27/1464 , H01L27/14645 , H01L27/1469 , H01L28/00 , H01L2224/32105 , H01L2224/32146 , H01L2224/48091 , H01L2224/48237 , H01L2224/73265 , H01L2225/06544 , H01L2924/15311 , H04N5/2253 , H01L2924/00014
Abstract: A device includes a first integrated circuit substrate including a plurality of first metal layers interconnected by first vias and a second integrated circuit substrate on the first integrated circuit substrate and including second metal layers interconnected by second vias. An insulation layer is disposed between the first and second substrates and a connection region is disposed in the insulation layer and electrically connects a first one of the first metal layers to a first one of the second metal layers. The device further includes a bonding pad on the second substrate and a through via extending from the bonding pad and into the second to contact a second one of the second metal layers. The through via is positioned so as to not overlap at least one of the first vias, the second vias and the connection region. Methods of fabricating such device are also described.
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10.
公开(公告)号:US20170092680A1
公开(公告)日:2017-03-30
申请号:US15273029
申请日:2016-09-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Doowon Kwon
IPC: H01L27/146 , H04N5/378 , H04N5/225
CPC classification number: H01L27/14634 , H01L23/49827 , H01L23/5226 , H01L24/32 , H01L25/0657 , H01L27/11582 , H01L27/14618 , H01L27/1462 , H01L27/14621 , H01L27/14627 , H01L27/14636 , H01L27/1464 , H01L27/14645 , H01L27/1469 , H01L28/00 , H01L2224/32105 , H01L2224/32146 , H01L2224/48091 , H01L2224/48237 , H01L2224/73265 , H01L2225/06544 , H01L2924/15311 , H04N5/2253 , H01L2924/00014
Abstract: A device includes a first integrated circuit substrate including a plurality of first metal layers interconnected by first vias and a second integrated circuit substrate on the first integrated circuit substrate and including second metal layers interconnected by second vias. An insulation layer is disposed between the first and second substrates and a connection region is disposed in the insulation layer and electrically connects a first one of the first metal layers to a first one of the second metal layers. The device further includes a bonding pad on the second substrate and a through via extending from the bonding pad and into the second to contact a second one of the second metal layers. The through via is positioned so as to not overlap at least one of the first vias, the second vias and the connection region. Methods of fabricating such device are also described.
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