Storage system, method, and apparatus for fast IO on PCIE devices

    公开(公告)号:US10762030B2

    公开(公告)日:2020-09-01

    申请号:US15227961

    申请日:2016-08-04

    Abstract: Embodiments of systems and methods for fast input/output (IO) on PCIE devices are described. Such methods include receiving an IO request from a user or application, the IO request comprising instructions for communicating data with a host system, the host system comprising a processing device and a memory device, analyzing information from the IO request in an IO block analyzer to select one of a plurality of communication paths for communicating the data with the host system, defining a routing instruction in a transfer routing information transmitter in response to the selected communication path, communicating the routing instruction in a Transaction Layer Packet (TLP) to an integrated IO (IIO) module of the host system routing the data from the peripheral device to either the processing device or the memory device according to the routing instruction with a data transfer router.

    Systems, methods, and apparatus for wear-level aware memory allocation

    公开(公告)号:US12111756B2

    公开(公告)日:2024-10-08

    申请号:US17396550

    申请日:2021-08-06

    CPC classification number: G06F12/023 G06F2212/1036

    Abstract: A method for memory allocation may include determining an amount of use for a first memory page, wherein the first memory page is mapped to a first page group of a first group level, a second memory page may be mapped to a second page group of the first group level, and the first memory page and the second memory page may be mapped to a third page group of a second group level, and selecting, based on an allocation request, the first memory page based on the amount of use. The amount of use may include a first amount of use, and the method may further include determining a second amount of use for the second memory page, wherein the first memory page may be selected based on the first amount of use and the second amount of use.

    Systems, methods, and devices for utilization aware memory allocation

    公开(公告)号:US12008248B2

    公开(公告)日:2024-06-11

    申请号:US17507775

    申请日:2021-10-21

    CPC classification number: G06F3/0631 G06F3/0604 G06F3/0644

    Abstract: A method may include receiving, from a process, a memory allocation request for a memory system comprising a first channel having a first channel utilization and a second channel having a second channel utilization, selecting, based on the first channel utilization and the second channel utilization, the first channel, and allocating, to the process, a page of memory from the first channel. The selecting may include selecting the first channel based on a balanced random policy. The selecting may include generating a ticket based on a random number and a number of free pages, comparing the ticket to a number of free pages of the first channel, and selecting the first channel based on the comparing. The selecting may include selecting the first channel based on a least used channel policy.

    Internal key hash directory in table

    公开(公告)号:US11520738B2

    公开(公告)日:2022-12-06

    申请号:US16837730

    申请日:2020-04-01

    Abstract: Provided is a system and method for searching for a target key in a database, the method including populating a hash-offset table of a sorted key table with hash-offset table entries, the hash-offset table entries having a hash-value corresponding to a respective key, and a hash offset, sorting the hash-offset table entries based on the hash-values, searching for a target hash-value of the hash-values corresponding to a target key in the hash-offset table, locating a target key-value pair corresponding to the target key based on the target hash-value, and saving a location of the target key-value pair.

    Quality of service (QOS)-aware input/output (IO) management for peripheral component interconnect express (PCIE) storage system with reconfigurable multi-ports

    公开(公告)号:US10713202B2

    公开(公告)日:2020-07-14

    申请号:US15227959

    申请日:2016-08-03

    Abstract: Embodiments of methods and systems for quality of service (QoS)-aware input/output (IO) management for a Peripheral Component Interconnect Express (PCIe) storage system with reconfigurable multi-ports are described. In an embodiment, a method includes receiving, in a receiver interface, an IO request from a software application, the IO request comprising information for communicating data over a data access port. The method may also include determining, in a transfer mode selector, a transfer mode selection for communicating the data over the data access port, the transfer mode being selected from a throughput-oriented mode, a latency-sensitive mode, or a balanced mode. Additionally, the method may include communicating, by a block distribution unit, the data over the data access port in response to the IO request, and according to the data transfer mode.

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