公开(公告)号：US20240250031A1

公开(公告)日：2024-07-25

申请号：US18594816

申请日：2024-03-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hongsik Shin ,  Sanghyun Lee ,  Hakyoon Ahn ,  Seonghan Oh ,  Youngmook Oh

IPC: H01L23/532 ,  H01L21/308 ,  H01L21/768 ,  H01L21/8234 ,  H01L27/06 ,  H01L27/088 ,  H01L29/165 ,  H01L29/66

CPC classification number: H01L23/53295 ,  H01L21/3083 ,  H01L21/76829 ,  H01L21/76837 ,  H01L21/76846 ,  H01L21/76897 ,  H01L21/823475 ,  H01L27/0629 ,  H01L27/088 ,  H01L28/20 ,  H01L29/66545 ,  H01L29/165 ,  H01L29/665 ,  H01L29/66636

Abstract: A semiconductor device including a metal pattern on a semiconductor substrate; an etch stop layer covering the metal pattern, the etch stop layer including a sequentially stacked first insulation layer, second insulation layer, and third insulation layer; an interlayer dielectric layer on the etch stop layer; and a contact plug penetrating the interlayer dielectric layer and the etch stop layer, the contact plug being connected to the metal pattern, wherein the first insulation layer includes a first insulating material that contains a metallic element and nitrogen, wherein the second insulation layer includes a second insulating material that contains carbon, and wherein the third insulation layer includes a third insulating material that does not contain a metallic element and carbon.

公开(公告)号：US12021146B2

公开(公告)日：2024-06-25

申请号：US17529406

申请日：2021-11-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hongsik Shin ,  Wonhyuk Lee ,  Dongkwon Kim ,  Jinwook Lee

IPC: H01L29/78 ,  H01L27/088 ,  H01L29/08

CPC classification number: H01L29/7851 ,  H01L27/0886 ,  H01L29/0847

Abstract: Semiconductor devices may include a substrate, an active region that is on the substrate and extends in a first direction, a gate structure that traverses the active region and extends in a second direction that may be different from the first direction, a source/drain region on the active region adjacent a side of the gate structure, an insulating layer on the substrate, the gate structure and the source/drain region, and a contact structure that is in the insulating layer and is connected to the source/drain region. In the source/drain region, a contact region that is in contact with the contact structure includes first and second side regions spaced apart from each other in the second direction and a central region between the first and second side regions, and at least one of the first and second side regions may include a recess.

公开(公告)号：US11948888B2

公开(公告)日：2024-04-02

申请号：US17338787

申请日：2021-06-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hongsik Shin ,  Sanghyun Lee ,  Hakyoon Ahn ,  Seonghan Oh ,  Youngmook Oh

IPC: H01L23/532 ,  H01L21/308 ,  H01L21/768 ,  H01L21/8234 ,  H01L27/06 ,  H01L27/088 ,  H01L29/66 ,  H01L49/02 ,  H01L29/165

CPC classification number: H01L23/53295 ,  H01L21/3083 ,  H01L21/76829 ,  H01L21/76837 ,  H01L21/76846 ,  H01L21/76897 ,  H01L21/823475 ,  H01L27/0629 ,  H01L27/088 ,  H01L28/20 ,  H01L29/66545 ,  H01L29/165 ,  H01L29/665 ,  H01L29/66636

Abstract: A semiconductor device including a metal pattern on a semiconductor substrate; an etch stop layer covering the metal pattern, the etch stop layer including a sequentially stacked first insulation layer, second insulation layer, and third insulation layer; an interlayer dielectric layer on the etch stop layer; and a contact plug penetrating the interlayer dielectric layer and the etch stop layer, the contact plug being connected to the metal pattern, wherein the first insulation layer includes a first insulating material that contains a metallic element and nitrogen, wherein the second insulation layer includes a second insulating material that contains carbon, and wherein the third insulation layer includes a third insulating material that does not contain a metallic element and carbon.

公开(公告)号：US20190229062A1

公开(公告)日：2019-07-25

申请号：US16167717

申请日：2018-10-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hongsik Shin ,  Sanghyun Lee ,  Hakyoon Ahn ,  Seonghan Oh ,  Youngmook Oh

IPC: H01L23/532 ,  H01L21/768 ,  H01L29/66 ,  H01L21/308 ,  H01L27/088

Abstract: A semiconductor device including a metal pattern on a semiconductor substrate; an etch stop layer covering the metal pattern, the etch stop layer including a sequentially stacked first insulation layer, second insulation layer, and third insulation layer; an interlayer dielectric layer on the etch stop layer; and a contact plug penetrating the interlayer dielectric layer and the etch stop layer, the contact plug being connected to the metal pattern, wherein the first insulation layer includes a first insulating material that contains a metallic element and nitrogen, wherein the second insulation layer includes a second insulating material that contains carbon, and wherein the third insulation layer includes a third insulating material that does not contain a metallic element and carbon.