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公开(公告)号:US20240430213A1
公开(公告)日:2024-12-26
申请号:US18675488
申请日:2024-05-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jinwook Lee , Seungcheol Lee , Seunghan Lee
IPC: H04L47/6295 , B60W60/00
Abstract: An electronic device, which is configured to be mounted on an autonomous vehicle, includes: a first interface circuit configured to communicate with a plurality of storage devices, a second interface circuit configured to communicate with a plurality of zones of the autonomous vehicle, an event detector configured to output an event signal in response to detecting event data received through the second interface circuit, an event manager configured to output a data division signal in response to the event signal, and an interface manager. The interface manager is configured to: divide the event data into a plurality of data fragments in response to the data division signal, allocate the plurality of data fragments to two or more storage devices among the plurality of storage devices, respectively, and control the first interface circuit such that the plurality of data fragments are respectively transmitted to the allocated two or more storage devices.
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公开(公告)号:US12021146B2
公开(公告)日:2024-06-25
申请号:US17529406
申请日:2021-11-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hongsik Shin , Wonhyuk Lee , Dongkwon Kim , Jinwook Lee
IPC: H01L29/78 , H01L27/088 , H01L29/08
CPC classification number: H01L29/7851 , H01L27/0886 , H01L29/0847
Abstract: Semiconductor devices may include a substrate, an active region that is on the substrate and extends in a first direction, a gate structure that traverses the active region and extends in a second direction that may be different from the first direction, a source/drain region on the active region adjacent a side of the gate structure, an insulating layer on the substrate, the gate structure and the source/drain region, and a contact structure that is in the insulating layer and is connected to the source/drain region. In the source/drain region, a contact region that is in contact with the contact structure includes first and second side regions spaced apart from each other in the second direction and a central region between the first and second side regions, and at least one of the first and second side regions may include a recess.
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公开(公告)号:US09673279B2
公开(公告)日:2017-06-06
申请号:US15208007
申请日:2016-07-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jeongyun Lee , Kwang-Yong Yang , Keomyoung Shin , Jinwook Lee , Yongseok Lee
IPC: H01L27/088 , H01L29/10 , H01L29/06 , H01L29/423 , H01L29/40 , H01L29/66 , H01L21/8234
CPC classification number: H01L29/1033 , H01L21/823412 , H01L29/0649 , H01L29/0673 , H01L29/401 , H01L29/42364 , H01L29/4966 , H01L29/513 , H01L29/66439 , H01L29/6653 , H01L29/6656
Abstract: A semiconductor device includes an isolation pattern on a substrate, the isolation pattern having a lower insulating pattern on the substrate, and a spacer to cover side surfaces of the lower insulating pattern, a vertical structure through the isolation pattern to contact the substrate, the vertical structure having a first semiconductor layer on the substrate, a lower end of the first semiconductor layer being at a lower level than a lower surface of the isolation pattern, a second semiconductor layer on the first semiconductor layer, and a third semiconductor layer on the second semiconductor layer, and a gate electrode crossing the vertical structure and extending over the isolation pattern.
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公开(公告)号:US20240387612A1
公开(公告)日:2024-11-21
申请号:US18633456
申请日:2024-04-11
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyooho Jung , Jongyeong Min , Joonsuk Park , Jiye Baek , Yeseul Lee , Jinwook Lee
Abstract: A semiconductor device may include a substrate and a capacitor on the substrate. The capacitor may include a lower electrode, a dielectric layer on the lower electrode, a first upper electrode on the dielectric layer, and a second upper electrode on the first upper electrode. The dielectric layer may include a metal oxide. The first upper electrode may include a metal nitride further including a first material having a work function of 4.8 eV or more. The second upper electrode may include the first material.
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公开(公告)号:US11004517B2
公开(公告)日:2021-05-11
申请号:US16356182
申请日:2019-03-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yunjung Lee , Chanha Kim , Suk-eun Kang , Seungkyung Ro , Kwangwoo Lee , Juwon Lee , Jinwook Lee , Heewon Lee
Abstract: A storage device includes a nonvolatile memory device including a memory block and a memory controller. The memory block includes a first memory region connected with a first word line and a second memory region connected with a second word line. The memory controller sets a read block voltage based on a first read voltage of the first memory region. The memory controller determines a second read voltage of the second memory region based on variation information and the read block voltage.
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公开(公告)号:US20200058359A1
公开(公告)日:2020-02-20
申请号:US16356182
申请日:2019-03-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yunjung Lee , Chanha Kim , Suk-eun Kang , Seungkyung Ro , Kwangwoo Lee , Juwon Lee , Jinwook Lee , Heewon Lee
Abstract: A storage device includes a nonvolatile memory device including a memory block and a memory controller. The memory block includes a first memory region connected with a first word line and a second memory region connected with a second word line. The memory controller sets a read block voltage based on a first read voltage of the first memory region. The memory controller determines a second read voltage of the second memory region based on variation information and the read block voltage.
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公开(公告)号:US20240412568A1
公开(公告)日:2024-12-12
申请号:US18678335
申请日:2024-05-30
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jinwook Lee , Sang-Hwa Jin , Seungcheol Lee
IPC: G07C5/00 , B60R16/033 , G07C5/08 , H02J7/00
Abstract: The present disclosure relates to electronic devices. An example electronic device installed in a vehicle includes a communication interface and a data retention circuit that communicates through the communication interface. The data retention circuit estimates a temperature of a storage device based on information about an outside temperature received through the communication interface and a preset temperature offset, and determines a data management period of the storage device in an off state based on the estimated temperature of the storage device and a data retention parameter.
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公开(公告)号:US20240387608A1
公开(公告)日:2024-11-21
申请号:US18444322
申请日:2024-02-16
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyooho Jung , Jongyeong Min , Jiye Baek , Joonsuk Park , Yeseul Lee , Jinwook Lee
IPC: H01L27/08
Abstract: A capacitor may include a primary lower electrode, an interface structure on a surface of the primary lower electrode, a primary dielectric layer including a metal oxide on the interface structure, the primary dielectric layer, and an upper electrode on the primary dielectric layer. The interface structure may include a first interface layer, a second interface layer, and a third interface layer. The first interface layer may have electrical conductivity, and may include a metal oxide doped with a pentavalent element. The second interface layer may be on the first interface layer, and may include a material further doped with nitrogen in the material of the first interface layer. The third interface layer may be on the second interface layer, and may include a metal oxide doped with nitrogen. A metal included in the metal oxide of the third interface layer may include a tetravalent metal.
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公开(公告)号:US10802728B2
公开(公告)日:2020-10-13
申请号:US16416750
申请日:2019-05-20
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kwangwoo Lee , Chanha Kim , Yunjung Lee , Jisoo Kim , Seungkyung Ro , Jinwook Lee , Heewon Lee
Abstract: A storage device includes a nonvolatile memory device including a plurality of memory blocks, each including a plurality of memory cells connected to a plurality of word lines, and a controller configured to perform a first read operation on memory cells connected to a selected word line included in a selected memory block based on a request of an external host device. The controller is further configured to perform a check read operation that checks a reliability of the memory cells of the selected memory block after performing the first read operation. In the check read operation, the controller is further configured to select and perform one of an actual check and a machine learning-based check.
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公开(公告)号:US09954061B2
公开(公告)日:2018-04-24
申请号:US15605698
申请日:2017-05-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jeongyun Lee , Kwang-Yong Yang , Keomyoung Shin , Jinwook Lee , Yongseok Lee
IPC: H01L27/088 , H01L29/10 , H01L29/06 , H01L29/423 , H01L29/40 , H01L29/66 , H01L21/8234 , H01L29/49 , H01L29/51
CPC classification number: H01L29/1033 , H01L21/823412 , H01L29/0649 , H01L29/0673 , H01L29/401 , H01L29/42364 , H01L29/4966 , H01L29/513 , H01L29/66439 , H01L29/6653 , H01L29/6656
Abstract: A semiconductor device includes an isolation pattern on a substrate, the isolation pattern having a lower insulating pattern on the substrate, and a spacer to cover side surfaces of the lower insulating pattern, a vertical structure through the isolation pattern to contact the substrate, the vertical structure having a first semiconductor layer on the substrate, a lower end of the first semiconductor layer being at a lower level than a lower surface of the isolation pattern, a second semiconductor layer on the first semiconductor layer, and a third semiconductor layer on the second semiconductor layer, and a gate electrode crossing the vertical structure and extending over the isolation pattern.
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