公开(公告)号：US20220302134A1

公开(公告)日：2022-09-22

申请号：US17345504

申请日：2021-06-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Inchan HWANG ,  Hwichan JUN

IPC: H01L27/11 ,  H01L27/092 ,  H01L23/528 ,  H01L29/423 ,  H01L29/786

Abstract: A semiconductor device including a static random access memory (SRAM) in a three-dimensional (3D) stack is provided. The semiconductor device includes a first transistor stack including a first channel and a first gate, a second transistor stack including a second channel and a second gate, the second transistor stack being disposed above the first transistor stack, a bit line disposed on a first portion of an upper surface of the first channel, a voltage source disposed on a first portion of an upper surface of the second channel and a first shared contact connecting the first channel to the second channel, where a width of the second channel is less than a width of the first channel.

公开(公告)号：US20210193808A1

公开(公告)日：2021-06-24

申请号：US17175850

申请日：2021-02-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Inchan HWANG ,  Heonjong SHIN ,  Sunghun JUNG ,  Doohyun LEE ,  Hwichan JUN ,  Hakyoon AHN

IPC: H01L29/417 ,  H01L29/423 ,  H01L29/45 ,  H01L21/285 ,  H01L29/06 ,  H01L27/092 ,  H01L29/08 ,  H01L21/8238 ,  H01L29/165 ,  H01L29/78

Abstract: A semiconductor device is disclosed. The semiconductor device may include a substrate including a first active pattern, the first active pattern vertically protruding from a top surface of the substrate, a first source/drain pattern filling a first recess, which is formed in an upper portion of the first active pattern, a first metal silicide layer on the first source/drain pattern, the first metal silicide layer including a first portion and a second portion, which are located on a first surface of the first source/drain pattern, and a first contact in contact with the second portion of the first metal silicide layer. A thickness of the first portion may be different from a thickness of the second portion.

公开(公告)号：US20170033048A1

公开(公告)日：2017-02-02

申请号：US15165016

申请日：2016-05-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chang-Hwa KIM ,  Joon-Gon LEE ,  Inchan HWANG

IPC: H01L23/535 ,  H01L29/66 ,  H01L23/532 ,  H01L21/768 ,  H01L29/78 ,  H01L23/528

CPC classification number: H01L29/66636 ,  H01L21/76804 ,  H01L21/76805 ,  H01L21/76816 ,  H01L21/76843 ,  H01L21/76877 ,  H01L21/76895 ,  H01L21/76897 ,  H01L23/485 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53295 ,  H01L29/66795 ,  H01L29/7851

Abstract: A semiconductor device includes a substrate with lower structures, an insulation layer covering the lower structures on the substrate, a contact hole through the insulation layer partially exposing the substrate, and a contact structure contacting the substrate through the contact hole, the contact structure including a barrier pattern having an upper barrier on an upper portion of a sidewall of the contact hole, and a lower barrier filling a lower portion of the contact hole, and a conductive contact pattern filling an upper portion of the contact hole defined by the upper barrier and the lower barrier.

Abstract translation: 半导体器件包括具有下结构的衬底，覆盖衬底上的下结构的绝缘层，通过绝缘层的部分暴露衬底的接触孔以及通过接触孔接触衬底的接触结构，接触结构包括 在接触孔的侧壁的上部具有上阻挡层的阻挡图案和填充接触孔的下部的下阻挡层以及填充由上阻挡层限定的接触孔的上部的导电接触图案，以及 较低的屏障。